2019-05-30 03:21:21 +08:00
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/*
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* QEMU TCG support -- s390x vector floating point instruction support
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*
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* Copyright (C) 2019 Red Hat Inc
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*
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* Authors:
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* David Hildenbrand <david@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "internal.h"
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#include "vec.h"
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#include "tcg_s390x.h"
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#include "tcg/tcg-gvec-desc.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#include "fpu/softfloat.h"
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#define VIC_INVALID 0x1
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#define VIC_DIVBYZERO 0x2
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#define VIC_OVERFLOW 0x3
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#define VIC_UNDERFLOW 0x4
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#define VIC_INEXACT 0x5
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/* returns the VEX. If the VEX is 0, there is no trap */
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static uint8_t check_ieee_exc(CPUS390XState *env, uint8_t enr, bool XxC,
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uint8_t *vec_exc)
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{
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uint8_t vece_exc = 0, trap_exc;
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unsigned qemu_exc;
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/* Retrieve and clear the softfloat exceptions */
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qemu_exc = env->fpu_status.float_exception_flags;
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if (qemu_exc == 0) {
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return 0;
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}
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env->fpu_status.float_exception_flags = 0;
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vece_exc = s390_softfloat_exc_to_ieee(qemu_exc);
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/* Add them to the vector-wide s390x exception bits */
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*vec_exc |= vece_exc;
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/* Check for traps and construct the VXC */
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trap_exc = vece_exc & env->fpc >> 24;
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if (trap_exc) {
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if (trap_exc & S390_IEEE_MASK_INVALID) {
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return enr << 4 | VIC_INVALID;
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} else if (trap_exc & S390_IEEE_MASK_DIVBYZERO) {
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return enr << 4 | VIC_DIVBYZERO;
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} else if (trap_exc & S390_IEEE_MASK_OVERFLOW) {
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return enr << 4 | VIC_OVERFLOW;
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} else if (trap_exc & S390_IEEE_MASK_UNDERFLOW) {
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return enr << 4 | VIC_UNDERFLOW;
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} else if (!XxC) {
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g_assert(trap_exc & S390_IEEE_MASK_INEXACT);
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/* inexact has lowest priority on traps */
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return enr << 4 | VIC_INEXACT;
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}
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}
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return 0;
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}
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static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc,
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uintptr_t retaddr)
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{
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if (vxc) {
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/* on traps, the fpc flags are not updated, instruction is suppressed */
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tcg_s390_vector_exception(env, vxc, retaddr);
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}
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if (vec_exc) {
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/* indicate exceptions for all elements combined */
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env->fpc |= vec_exc << 16;
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}
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}
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typedef uint64_t (*vop64_3_fn)(uint64_t a, uint64_t b, float_status *s);
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static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vop64_3_fn fn,
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uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int i;
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for (i = 0; i < 2; i++) {
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const uint64_t a = s390_vec_read_element64(v2, i);
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const uint64_t b = s390_vec_read_element64(v3, i);
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s390_vec_write_element64(&tmp, i, fn(a, b, &env->fpu_status));
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vxc = check_ieee_exc(env, i, false, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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}
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static uint64_t vfa64(uint64_t a, uint64_t b, float_status *s)
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{
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return float64_add(a, b, s);
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}
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void HELPER(gvec_vfa64)(void *v1, const void *v2, const void *v3,
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CPUS390XState *env, uint32_t desc)
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{
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vop64_3(v1, v2, v3, env, false, vfa64, GETPC());
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}
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void HELPER(gvec_vfa64s)(void *v1, const void *v2, const void *v3,
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CPUS390XState *env, uint32_t desc)
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{
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vop64_3(v1, v2, v3, env, true, vfa64, GETPC());
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}
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2019-05-30 03:30:56 +08:00
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static int wfc64(const S390Vector *v1, const S390Vector *v2,
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CPUS390XState *env, bool signal, uintptr_t retaddr)
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{
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/* only the zero-indexed elements are compared */
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const float64 a = s390_vec_read_element64(v1, 0);
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const float64 b = s390_vec_read_element64(v2, 0);
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uint8_t vxc, vec_exc = 0;
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int cmp;
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if (signal) {
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cmp = float64_compare(a, b, &env->fpu_status);
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} else {
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cmp = float64_compare_quiet(a, b, &env->fpu_status);
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}
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vxc = check_ieee_exc(env, 0, false, &vec_exc);
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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return float_comp_to_cc(env, cmp);
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}
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void HELPER(gvec_wfc64)(const void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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env->cc_op = wfc64(v1, v2, env, false, GETPC());
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}
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void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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env->cc_op = wfc64(v1, v2, env, true, GETPC());
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}
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