2010-05-14 15:28:59 +08:00
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/*
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* PC SMBus implementation
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* splitted from acpi.c
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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2010-05-16 01:52:49 +08:00
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/>.
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2010-05-14 15:28:59 +08:00
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*/
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2013-02-04 22:40:22 +08:00
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#include "hw/hw.h"
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2013-02-06 00:06:20 +08:00
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#include "hw/i386/pc.h"
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#include "hw/i2c/pm_smbus.h"
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#include "hw/i2c/smbus.h"
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2010-05-14 15:28:59 +08:00
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/* no save/load? */
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#define SMBHSTSTS 0x00
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#define SMBHSTCNT 0x02
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#define SMBHSTCMD 0x03
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#define SMBHSTADD 0x04
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#define SMBHSTDAT0 0x05
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#define SMBHSTDAT1 0x06
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#define SMBBLKDAT 0x07
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2013-07-08 05:03:02 +08:00
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#define STS_HOST_BUSY (1)
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#define STS_INTR (1<<1)
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#define STS_DEV_ERR (1<<2)
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#define STS_BUS_ERR (1<<3)
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#define STS_FAILED (1<<4)
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#define STS_SMBALERT (1<<5)
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#define STS_INUSE_STS (1<<6)
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#define STS_BYTE_DONE (1<<7)
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/* Signs of successfully transaction end :
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* ByteDoneStatus = 1 (STS_BYTE_DONE) and INTR = 1 (STS_INTR )
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*/
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2010-05-14 15:29:21 +08:00
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//#define DEBUG
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#ifdef DEBUG
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# define SMBUS_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
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#else
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# define SMBUS_DPRINTF(format, ...) do { } while (0)
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#endif
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2010-05-14 15:28:59 +08:00
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static void smb_transaction(PMSMBus *s)
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{
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uint8_t prot = (s->smb_ctl >> 2) & 0x07;
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uint8_t read = s->smb_addr & 0x01;
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uint8_t cmd = s->smb_cmd;
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uint8_t addr = s->smb_addr >> 1;
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i2c_bus *bus = s->smbus;
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2010-05-14 15:29:21 +08:00
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SMBUS_DPRINTF("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot);
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2013-07-08 05:03:02 +08:00
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/* Transaction isn't exec if STS_DEV_ERR bit set */
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if ((s->smb_stat & STS_DEV_ERR) != 0) {
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goto error;
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}
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2010-05-14 15:28:59 +08:00
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switch(prot) {
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case 0x0:
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smbus_quick_command(bus, addr, read);
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2013-07-08 05:03:02 +08:00
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s->smb_stat |= STS_BYTE_DONE | STS_INTR;
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2010-05-14 15:28:59 +08:00
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break;
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case 0x1:
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if (read) {
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s->smb_data0 = smbus_receive_byte(bus, addr);
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} else {
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smbus_send_byte(bus, addr, cmd);
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}
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2013-07-08 05:03:02 +08:00
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s->smb_stat |= STS_BYTE_DONE | STS_INTR;
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2010-05-14 15:28:59 +08:00
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break;
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case 0x2:
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if (read) {
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s->smb_data0 = smbus_read_byte(bus, addr, cmd);
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} else {
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smbus_write_byte(bus, addr, cmd, s->smb_data0);
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}
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2013-07-08 05:03:02 +08:00
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s->smb_stat |= STS_BYTE_DONE | STS_INTR;
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2010-05-14 15:28:59 +08:00
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break;
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case 0x3:
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if (read) {
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uint16_t val;
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val = smbus_read_word(bus, addr, cmd);
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s->smb_data0 = val;
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s->smb_data1 = val >> 8;
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} else {
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smbus_write_word(bus, addr, cmd, (s->smb_data1 << 8) | s->smb_data0);
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}
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2013-07-08 05:03:02 +08:00
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s->smb_stat |= STS_BYTE_DONE | STS_INTR;
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2010-05-14 15:28:59 +08:00
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break;
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case 0x5:
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if (read) {
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s->smb_data0 = smbus_read_block(bus, addr, cmd, s->smb_data);
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} else {
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smbus_write_block(bus, addr, cmd, s->smb_data, s->smb_data0);
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}
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2013-07-08 05:03:02 +08:00
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s->smb_stat |= STS_BYTE_DONE | STS_INTR;
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2010-05-14 15:28:59 +08:00
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break;
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default:
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goto error;
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}
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return;
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error:
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2013-07-08 05:03:02 +08:00
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s->smb_stat |= STS_DEV_ERR;
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2010-05-14 15:28:59 +08:00
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}
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2012-11-23 21:57:01 +08:00
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static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
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unsigned width)
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2010-05-14 15:28:59 +08:00
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{
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PMSMBus *s = opaque;
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2012-11-23 21:57:01 +08:00
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2010-05-14 15:29:21 +08:00
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SMBUS_DPRINTF("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
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2010-05-14 15:28:59 +08:00
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switch(addr) {
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case SMBHSTSTS:
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2013-07-08 05:03:02 +08:00
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s->smb_stat = (~(val & 0xff)) & s->smb_stat;
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2010-05-14 15:28:59 +08:00
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s->smb_index = 0;
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break;
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case SMBHSTCNT:
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s->smb_ctl = val;
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if (val & 0x40)
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smb_transaction(s);
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break;
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case SMBHSTCMD:
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s->smb_cmd = val;
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break;
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case SMBHSTADD:
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s->smb_addr = val;
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break;
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case SMBHSTDAT0:
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s->smb_data0 = val;
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break;
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case SMBHSTDAT1:
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s->smb_data1 = val;
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break;
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case SMBBLKDAT:
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s->smb_data[s->smb_index++] = val;
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if (s->smb_index > 31)
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s->smb_index = 0;
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break;
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default:
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break;
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}
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}
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2012-11-23 21:57:01 +08:00
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static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
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2010-05-14 15:28:59 +08:00
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{
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PMSMBus *s = opaque;
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uint32_t val;
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switch(addr) {
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case SMBHSTSTS:
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val = s->smb_stat;
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break;
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case SMBHSTCNT:
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s->smb_index = 0;
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val = s->smb_ctl & 0x1f;
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break;
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case SMBHSTCMD:
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val = s->smb_cmd;
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break;
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case SMBHSTADD:
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val = s->smb_addr;
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break;
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case SMBHSTDAT0:
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val = s->smb_data0;
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break;
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case SMBHSTDAT1:
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val = s->smb_data1;
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break;
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case SMBBLKDAT:
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val = s->smb_data[s->smb_index++];
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if (s->smb_index > 31)
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s->smb_index = 0;
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break;
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default:
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val = 0;
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break;
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}
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2010-05-14 15:29:21 +08:00
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SMBUS_DPRINTF("SMB readb port=0x%04x val=0x%02x\n", addr, val);
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2010-05-14 15:28:59 +08:00
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return val;
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}
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2012-11-23 21:57:01 +08:00
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static const MemoryRegionOps pm_smbus_ops = {
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.read = smb_ioport_readb,
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.write = smb_ioport_writeb,
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.valid.min_access_size = 1,
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.valid.max_access_size = 1,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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2010-05-14 15:28:59 +08:00
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void pm_smbus_init(DeviceState *parent, PMSMBus *smb)
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{
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smb->smbus = i2c_init_bus(parent, "i2c");
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2013-06-07 09:25:08 +08:00
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memory_region_init_io(&smb->io, OBJECT(parent), &pm_smbus_ops, smb,
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"pm-smbus", 64);
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2010-05-14 15:28:59 +08:00
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}
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