2007-01-18 04:03:15 +08:00
|
|
|
Unsolved issues/bugs in the mips/mipsel backend
|
|
|
|
|
-----------------------------------------------
|
|
|
|
|
|
2007-01-20 01:56:23 +08:00
|
|
|
General
|
|
|
|
|
-------
|
2007-10-14 03:00:52 +08:00
|
|
|
- Unimplemented ASEs:
|
|
|
|
|
- MIPS16
|
|
|
|
|
- MDMX
|
|
|
|
|
- SmartMIPS
|
|
|
|
|
- DSP r1
|
|
|
|
|
- DSP r2
|
|
|
|
|
- MT ASE only partially implemented and not functional
|
|
|
|
|
- Shadow register support only partially implemented,
|
|
|
|
|
lacks set switching on interrupt/exception.
|
|
|
|
|
- 34K ITC not implemented.
|
|
|
|
|
- A general lack of documentation, especially for technical internals.
|
|
|
|
|
Existing documentation is x86-centric.
|
|
|
|
|
- Reverse endianness bit not implemented
|
|
|
|
|
- The TLB emulation is very inefficient:
|
|
|
|
|
Qemu's softmmu implements a x86-style MMU, with separate entries
|
|
|
|
|
for read/write/execute, a TLB index which is just a modulo of the
|
|
|
|
|
virtual address, and a set of TLBs for each user/kernel/supervisor
|
|
|
|
|
MMU mode.
|
|
|
|
|
MIPS has a single entry for read/write/execute and only one MMU mode.
|
|
|
|
|
But it is fully associative with randomized entry indices, and uses
|
|
|
|
|
up to 256 ASID tags as additional matching criterion (which roughly
|
|
|
|
|
equates to 256 MMU modes). It also has a global flag which causes
|
|
|
|
|
entries to match regardless of ASID.
|
|
|
|
|
To cope with these differences, Qemu currently flushes the TLB at
|
|
|
|
|
each ASID change. Using the MMU modes to implement ASIDs hinges on
|
|
|
|
|
implementing the global bit efficiently.
|
2007-01-18 04:03:15 +08:00
|
|
|
|
2007-01-20 01:56:23 +08:00
|
|
|
MIPS64
|
|
|
|
|
------
|
2007-09-30 09:58:33 +08:00
|
|
|
- Userland emulation (both n32 and n64) not functional.
|
2007-01-20 01:56:23 +08:00
|
|
|
|
|
|
|
|
"Generic" 4Kc system emulation
|
|
|
|
|
------------------------------
|
|
|
|
|
- Doesn't correspond to any real hardware.
|
|
|
|
|
|
2007-04-29 05:44:04 +08:00
|
|
|
PICA 61 system emulation
|
|
|
|
|
------------------------
|
|
|
|
|
- No framebuffer support yet.
|
|
|
|
|
|
2007-01-20 01:56:23 +08:00
|
|
|
MALTA system emulation
|
|
|
|
|
----------------------
|
2007-01-18 04:03:15 +08:00
|
|
|
- We fake firmware support instead of doing the real thing
|
2007-02-02 10:56:33 +08:00
|
|
|
- Real firmware falls over when trying to init RAM, presumably due
|
2007-03-31 02:56:19 +08:00
|
|
|
to lacking system controller emulation.
|
2007-12-17 11:53:42 +08:00
|
|
|
- Bonito system controller not implemented
|
|
|
|
|
- MSC1 system controller not implemented
|
