2003-10-01 04:34:21 +08:00
|
|
|
|
|
|
|
/* this struct defines the way the registers are stored on the
|
|
|
|
stack during a system call. */
|
|
|
|
|
|
|
|
struct target_pt_regs {
|
2007-10-15 00:27:31 +08:00
|
|
|
abi_long uregs[18];
|
2003-10-01 04:34:21 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
#define ARM_cpsr uregs[16]
|
|
|
|
#define ARM_pc uregs[15]
|
|
|
|
#define ARM_lr uregs[14]
|
|
|
|
#define ARM_sp uregs[13]
|
|
|
|
#define ARM_ip uregs[12]
|
|
|
|
#define ARM_fp uregs[11]
|
|
|
|
#define ARM_r10 uregs[10]
|
|
|
|
#define ARM_r9 uregs[9]
|
|
|
|
#define ARM_r8 uregs[8]
|
|
|
|
#define ARM_r7 uregs[7]
|
|
|
|
#define ARM_r6 uregs[6]
|
|
|
|
#define ARM_r5 uregs[5]
|
|
|
|
#define ARM_r4 uregs[4]
|
|
|
|
#define ARM_r3 uregs[3]
|
|
|
|
#define ARM_r2 uregs[2]
|
|
|
|
#define ARM_r1 uregs[1]
|
|
|
|
#define ARM_r0 uregs[0]
|
|
|
|
#define ARM_ORIG_r0 uregs[17]
|
|
|
|
|
|
|
|
#define ARM_SYSCALL_BASE 0x900000
|
2005-04-28 04:11:21 +08:00
|
|
|
#define ARM_THUMB_SYSCALL 0
|
2004-04-26 02:00:45 +08:00
|
|
|
|
2008-05-29 08:20:44 +08:00
|
|
|
#define ARM_NR_BASE 0xf0000
|
|
|
|
#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
|
|
|
|
#define ARM_NR_set_tls (ARM_NR_BASE + 5)
|
2004-09-14 05:41:39 +08:00
|
|
|
|
2005-04-24 02:25:41 +08:00
|
|
|
#define ARM_NR_semihosting 0x123456
|
|
|
|
#define ARM_NR_thumb_semihosting 0xAB
|
|
|
|
|
2004-09-14 05:41:39 +08:00
|
|
|
#if defined(TARGET_WORDS_BIGENDIAN)
|
2005-02-01 04:45:13 +08:00
|
|
|
#define UNAME_MACHINE "armv5teb"
|
2004-09-14 05:41:39 +08:00
|
|
|
#else
|
2005-02-01 04:45:13 +08:00
|
|
|
#define UNAME_MACHINE "armv5tel"
|
2004-09-14 05:41:39 +08:00
|
|
|
#endif
|