2005-07-02 22:58:51 +08:00
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/*
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* MIPS emulation memory micro-operations for qemu.
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2007-09-17 05:08:06 +08:00
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*
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2005-07-02 22:58:51 +08:00
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* Copyright (c) 2004-2005 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2005-12-06 03:59:36 +08:00
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/* "half" load and stores. We must do the memory access inline,
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or fault handling won't work. */
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2007-10-09 11:12:08 +08:00
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#ifdef TARGET_WORDS_BIGENDIAN
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#define GET_LMASK(v) ((v) & 3)
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#define GET_OFFSET(addr, offset) (addr + (offset))
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#else
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#define GET_LMASK(v) (((v) & 3) ^ 3)
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#define GET_OFFSET(addr, offset) (addr - (offset))
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#endif
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2005-07-02 22:58:51 +08:00
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void glue(op_lwl, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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target_ulong tmp;
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tmp = glue(ldub, MEMSUFFIX)(T0);
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2007-10-24 07:23:43 +08:00
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T1 = (T1 & 0x00FFFFFF) | (tmp << 24);
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2007-10-09 11:12:08 +08:00
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if (GET_LMASK(T0) <= 2) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 1));
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T1 = (T1 & 0xFF00FFFF) | (tmp << 16);
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}
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if (GET_LMASK(T0) <= 1) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 2));
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T1 = (T1 & 0xFFFF00FF) | (tmp << 8);
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}
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if (GET_LMASK(T0) == 0) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 3));
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T1 = (T1 & 0xFFFFFF00) | tmp;
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}
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2007-10-24 07:23:43 +08:00
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T1 = (int32_t)T1;
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2005-07-02 22:58:51 +08:00
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}
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void glue(op_lwr, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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target_ulong tmp;
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tmp = glue(ldub, MEMSUFFIX)(T0);
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T1 = (T1 & 0xFFFFFF00) | tmp;
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if (GET_LMASK(T0) >= 1) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -1));
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T1 = (T1 & 0xFFFF00FF) | (tmp << 8);
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}
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if (GET_LMASK(T0) >= 2) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -2));
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T1 = (T1 & 0xFF00FFFF) | (tmp << 16);
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}
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if (GET_LMASK(T0) == 3) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -3));
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T1 = (T1 & 0x00FFFFFF) | (tmp << 24);
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}
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2007-10-24 07:23:43 +08:00
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T1 = (int32_t)T1;
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2005-07-02 22:58:51 +08:00
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}
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void glue(op_swl, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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glue(stb, MEMSUFFIX)(T0, (uint8_t)(T1 >> 24));
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if (GET_LMASK(T0) <= 2)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 1), (uint8_t)(T1 >> 16));
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if (GET_LMASK(T0) <= 1)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 2), (uint8_t)(T1 >> 8));
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if (GET_LMASK(T0) == 0)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)T1);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2005-07-02 22:58:51 +08:00
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}
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void glue(op_swr, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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glue(stb, MEMSUFFIX)(T0, (uint8_t)T1);
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if (GET_LMASK(T0) >= 1)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -1), (uint8_t)(T1 >> 8));
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if (GET_LMASK(T0) >= 2)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -2), (uint8_t)(T1 >> 16));
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if (GET_LMASK(T0) == 3)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24));
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2005-07-02 22:58:51 +08:00
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}
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2007-11-09 02:05:37 +08:00
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#if defined(TARGET_MIPS64)
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2006-12-21 09:19:56 +08:00
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/* "half" load and stores. We must do the memory access inline,
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or fault handling won't work. */
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2007-10-09 11:12:08 +08:00
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#ifdef TARGET_WORDS_BIGENDIAN
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#define GET_LMASK64(v) ((v) & 7)
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#else
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#define GET_LMASK64(v) (((v) & 7) ^ 7)
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#endif
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2006-12-21 09:19:56 +08:00
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void glue(op_ldl, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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uint64_t tmp;
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tmp = glue(ldub, MEMSUFFIX)(T0);
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T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);
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if (GET_LMASK64(T0) <= 6) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 1));
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T1 = (T1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48);
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}
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if (GET_LMASK64(T0) <= 5) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 2));
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T1 = (T1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40);
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}
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if (GET_LMASK64(T0) <= 4) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 3));
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T1 = (T1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32);
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}
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if (GET_LMASK64(T0) <= 3) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 4));
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T1 = (T1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24);
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}
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if (GET_LMASK64(T0) <= 2) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 5));
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T1 = (T1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16);
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}
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if (GET_LMASK64(T0) <= 1) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 6));
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T1 = (T1 & 0xFFFFFFFFFFFF00FFULL) | (tmp << 8);
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}
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if (GET_LMASK64(T0) == 0) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 7));
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T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;
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}
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-12-21 09:19:56 +08:00
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}
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void glue(op_ldr, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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uint64_t tmp;
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tmp = glue(ldub, MEMSUFFIX)(T0);
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T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;
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if (GET_LMASK64(T0) >= 1) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -1));
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T1 = (T1 & 0xFFFFFFFFFFFF00FFULL) | (tmp << 8);
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}
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if (GET_LMASK64(T0) >= 2) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -2));
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T1 = (T1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16);
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}
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if (GET_LMASK64(T0) >= 3) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -3));
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T1 = (T1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24);
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}
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if (GET_LMASK64(T0) >= 4) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -4));
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T1 = (T1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32);
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}
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if (GET_LMASK64(T0) >= 5) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -5));
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T1 = (T1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40);
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}
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if (GET_LMASK64(T0) >= 6) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -6));
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T1 = (T1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48);
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}
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if (GET_LMASK64(T0) == 7) {
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tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -7));
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T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);
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}
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-12-21 09:19:56 +08:00
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}
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void glue(op_sdl, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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glue(stb, MEMSUFFIX)(T0, (uint8_t)(T1 >> 56));
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if (GET_LMASK64(T0) <= 6)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 1), (uint8_t)(T1 >> 48));
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if (GET_LMASK64(T0) <= 5)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 2), (uint8_t)(T1 >> 40));
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if (GET_LMASK64(T0) <= 4)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)(T1 >> 32));
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if (GET_LMASK64(T0) <= 3)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 4), (uint8_t)(T1 >> 24));
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if (GET_LMASK64(T0) <= 2)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 5), (uint8_t)(T1 >> 16));
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if (GET_LMASK64(T0) <= 1)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 6), (uint8_t)(T1 >> 8));
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if (GET_LMASK64(T0) <= 0)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 7), (uint8_t)T1);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-12-21 09:19:56 +08:00
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}
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void glue(op_sdr, MEMSUFFIX) (void)
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{
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2007-10-09 11:12:08 +08:00
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glue(stb, MEMSUFFIX)(T0, (uint8_t)T1);
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if (GET_LMASK64(T0) >= 1)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -1), (uint8_t)(T1 >> 8));
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if (GET_LMASK64(T0) >= 2)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -2), (uint8_t)(T1 >> 16));
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if (GET_LMASK64(T0) >= 3)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24));
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if (GET_LMASK64(T0) >= 4)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -4), (uint8_t)(T1 >> 32));
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if (GET_LMASK64(T0) >= 5)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -5), (uint8_t)(T1 >> 40));
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if (GET_LMASK64(T0) >= 6)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -6), (uint8_t)(T1 >> 48));
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if (GET_LMASK64(T0) == 7)
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glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -7), (uint8_t)(T1 >> 56));
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-12-21 09:19:56 +08:00
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}
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2007-11-09 02:05:37 +08:00
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#endif /* TARGET_MIPS64 */
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2006-12-21 09:19:56 +08:00
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2006-06-14 20:56:19 +08:00
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void glue(op_lwc1, MEMSUFFIX) (void)
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{
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WT0 = glue(ldl, MEMSUFFIX)(T0);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-06-14 20:56:19 +08:00
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}
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void glue(op_swc1, MEMSUFFIX) (void)
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{
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glue(stl, MEMSUFFIX)(T0, WT0);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-06-14 20:56:19 +08:00
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}
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void glue(op_ldc1, MEMSUFFIX) (void)
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{
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DT0 = glue(ldq, MEMSUFFIX)(T0);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-06-14 20:56:19 +08:00
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}
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void glue(op_sdc1, MEMSUFFIX) (void)
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{
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glue(stq, MEMSUFFIX)(T0, DT0);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2006-06-14 20:56:19 +08:00
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}
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2007-05-07 21:55:33 +08:00
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void glue(op_luxc1, MEMSUFFIX) (void)
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{
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2007-05-20 09:36:29 +08:00
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DT0 = glue(ldq, MEMSUFFIX)(T0 & ~0x7);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2007-05-07 21:55:33 +08:00
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}
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void glue(op_suxc1, MEMSUFFIX) (void)
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{
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2007-05-20 09:36:29 +08:00
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glue(stq, MEMSUFFIX)(T0 & ~0x7, DT0);
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2007-11-10 07:09:41 +08:00
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FORCE_RET();
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2007-05-07 21:55:33 +08:00
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}
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