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qemu/tests/tcg/xtensa/test_s32c1i.S

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target-xtensa: allow using core configuration in tests Add path to the core configuration directory to test build command and replace .include asm directive with #include to enable preprocessing. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-11 00:20:52 +08:00
#include "macros.inc"
target-xtensa: add s32c1i unit tests Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-05 11:15:26 +08:00
test_suite s32c1i
tests/tcg/xtensa: conditionalize and fix s32c1i tests Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-18 23:15:10 +08:00
#if XCHAL_HAVE_S32C1I
target-xtensa: add s32c1i unit tests Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-05 11:15:26 +08:00
test s32c1i_nowrite
tests/tcg/xtensa: conditionalize and fix s32c1i tests Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-18 23:15:10 +08:00
#if XCHAL_HW_VERSION >= 230000
movi a2, 0x29
wsr a2, atomctl
#endif
target-xtensa: add s32c1i unit tests Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-05 11:15:26 +08:00
movi a2, 1f
movi a3, 1
wsr a3, scompare1
movi a1, 2
s32c1i a1, a2, 0
assert ne, a1, a3
l32i a1, a2, 0
assert eqi, a1, 3
.data
.align 4
1:
.word 3
.text
test_end
test s32c1i_write
tests/tcg/xtensa: conditionalize and fix s32c1i tests Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-18 23:15:10 +08:00
#if XCHAL_HW_VERSION >= 230000
movi a2, 0x29
wsr a2, atomctl
#endif
target-xtensa: add s32c1i unit tests Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-05 11:15:26 +08:00
movi a2, 1f
movi a3, 3
wsr a3, scompare1
movi a1, 2
s32c1i a1, a2, 0
assert eq, a1, a3
l32i a1, a2, 0
assert eqi, a1, 2
.data
.align 4
1:
.word 3
.text
test_end
tests/tcg/xtensa: conditionalize and fix s32c1i tests Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-18 23:15:10 +08:00
#endif
target-xtensa: add s32c1i unit tests Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-05 11:15:26 +08:00
test_suite_end