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qemu
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Convert SD cards code to use qemu_irq too. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3671 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2007-11-17 14:34:44 +00:00
parent 38641a52f2
commit 02ce600c1e
6 changed files with 22 additions and 63 deletions
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22
hw/omap_mmc.c
View File

@ -25,7 +25,6 @@ struct omap_mmc_s {
target_phys_addr_t base;
qemu_irq irq;
qemu_irq *dma;
qemu_irq handler[2];
omap_clk clk;
SDState *card;
uint16_t last_cmd;
@ -507,22 +506,6 @@ void omap_mmc_reset(struct omap_mmc_s *host)
host->transfer = 0;
}
static void omap_mmc_ro_cb(void *opaque, int level)
{
struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
if (s->handler[0])
qemu_set_irq(s->handler[0], level);
}
static void omap_mmc_cover_cb(void *opaque, int level)
{
struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
if (s->handler[1])
qemu_set_irq(s->handler[1], level);
}
struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base,
qemu_irq irq, qemu_irq dma[], omap_clk clk)
{
@ -542,13 +525,10 @@ struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base,
/* Instantiate the storage */
s->card = sd_init(sd_bdrv);
sd_set_cb(s->card, s, omap_mmc_ro_cb, omap_mmc_cover_cb);
return s;
}
void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover)
{
s->handler[0] = ro;
s->handler[1] = cover;
sd_set_cb(s->card, ro, cover);
}

5
hw/pxa.h
View File

@ -96,9 +96,8 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle);
struct pxa2xx_mmci_s;
struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
qemu_irq irq, void *dma);
void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, void *opaque,
void (*readonly_cb)(void *, int),
void (*coverswitch_cb)(void *, int));
void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly,
qemu_irq coverswitch);
/* pxa2xx_pcmcia.c */
struct pxa2xx_pcmcia_s;

7
hw/pxa2xx_mmci.c
View File

@ -545,9 +545,8 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
return s;
}
void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, void *opaque,
void (*readonly_cb)(void *, int),
void (*coverswitch_cb)(void *, int))
void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly,
qemu_irq coverswitch)
{
sd_set_cb(s->card, opaque, readonly_cb, coverswitch_cb);
sd_set_cb(s->card, read, coverswitch);
}

30
hw/sd.c
View File

@ -90,9 +90,8 @@ struct SDState {
uint32_t data_start;
uint32_t data_offset;
uint8_t data[512];
void (*readonly_cb)(void *, int);
void (*inserted_cb)(void *, int);
void *opaque;
qemu_irq readonly_cb;
qemu_irq inserted_cb;
BlockDriverState *bdrv;
};
@ -372,6 +371,8 @@ static void sd_reset(SDState *sd, BlockDriverState *bdrv)
sd->bdrv = bdrv;
if (s->wp_groups)
qemu_free(s->wp_groups);
sd->wp_switch = bdrv_is_read_only(bdrv);
sd->wp_groups = (int *) qemu_mallocz(sizeof(int) * sect);
memset(sd->wp_groups, 0, sizeof(int) * sect);
@ -386,12 +387,10 @@ static void sd_reset(SDState *sd, BlockDriverState *bdrv)
static void sd_cardchange(void *opaque)
{
SDState *sd = opaque;
if (sd->inserted_cb)
sd->inserted_cb(sd->opaque, bdrv_is_inserted(sd->bdrv));
qemu_set_irq(sd->inserted_cb, bdrv_is_inserted(sd->bdrv));
if (bdrv_is_inserted(sd->bdrv)) {
sd_reset(sd, sd->bdrv);
if (sd->readonly_cb)
sd->readonly_cb(sd->opaque, sd->wp_switch);
qemu_set_irq(s->readonly_cb, sd->wp_switch);
}
}
@ -401,21 +400,16 @@ SDState *sd_init(BlockDriverState *bs)
sd = (SDState *) qemu_mallocz(sizeof(SDState));
sd_reset(sd, bs);
bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd);
return sd;
}
void sd_set_cb(SDState *sd, void *opaque,
void (*readonly_cb)(void *, int),
void (*inserted_cb)(void *, int))
void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert)
{
sd->opaque = opaque;
sd->readonly_cb = readonly_cb;
sd->inserted_cb = inserted_cb;
if (sd->readonly_cb)
sd->readonly_cb(sd->opaque, bdrv_is_read_only(sd->bdrv));
if (sd->inserted_cb)
sd->inserted_cb(sd->opaque, bdrv_is_inserted(sd->bdrv));
bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd);
sd->readonly_cb = readonly;
sd->inserted_cb = insert;
qemu_set_irq(readonly, bdrv_is_read_only(sd->bdrv));
qemu_set_irq(insert, bdrv_is_inserted(sd->bdrv));
}
static void sd_erase(SDState *sd)

4
hw/sd.h
View File

@ -74,9 +74,7 @@ int sd_do_command(SDState *sd, struct sd_request_s *req,
uint8_t *response);
void sd_write_data(SDState *sd, uint8_t value);
uint8_t sd_read_data(SDState *sd);
void sd_set_cb(SDState *sd, void *opaque,
void (*readonly_cb)(void *, int),
void (*inserted_cb)(void *, int));
void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert);
int sd_data_ready(SDState *sd);
#endif /* __hw_sd_h */

17
hw/spitz.c
View File

@ -1069,18 +1069,6 @@ static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
spitz_hsync ^= 1;
}
static void spitz_mmc_coverswitch_change(void *opaque, int in)
{
struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT], in);
}
static void spitz_mmc_writeprotect_change(void *opaque, int wp)
{
struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], wp);
}
static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
{
qemu_irq lcd_hsync;
@ -1096,8 +1084,9 @@ static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
/* MMC/SD host */
pxa2xx_mmci_handlers(cpu->mmc, cpu, spitz_mmc_writeprotect_change,
spitz_mmc_coverswitch_change);
pxa2xx_mmci_handlers(cpu->mmc,
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP],
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]);
/* Battery lock always closed */
qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);