From 16c1deae215d4aac5b9b4fc090844b92852a0c5b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Llu=C3=ADs=20Vilanova?= <vilanova@ac.upc.edu>
Date: Mon, 13 Feb 2012 16:33:58 +0100
Subject: [PATCH 1/5] target-xtensa: Move helpers.h to helper.h
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Provides a file naming scheme consistent with other targets.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target-xtensa/{helpers.h => helper.h} | 0
target-xtensa/op_helper.c | 2 +-
target-xtensa/translate.c | 6 +++---
xtensa-semi.c | 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
rename target-xtensa/{helpers.h => helper.h} (100%)
diff --git a/target-xtensa/helpers.h b/target-xtensa/helper.h
similarity index 100%
rename from target-xtensa/helpers.h
rename to target-xtensa/helper.h
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index cdef0db52e..806384f310 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -27,7 +27,7 @@
#include "cpu.h"
#include "dyngen-exec.h"
-#include "helpers.h"
+#include "helper.h"
#include "host-utils.h"
static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index e0ff72b3f8..492dbccd53 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -37,9 +37,9 @@
#include "qemu-log.h"
#include "sysemu.h"
-#include "helpers.h"
+#include "helper.h"
#define GEN_HELPER 1
-#include "helpers.h"
+#include "helper.h"
typedef struct DisasContext {
const XtensaConfig *config;
@@ -183,7 +183,7 @@ void xtensa_translate_init(void)
}
}
#define GEN_HELPER 2
-#include "helpers.h"
+#include "helper.h"
}
static inline bool option_bits_enabled(DisasContext *dc, uint64_t opt)
diff --git a/xtensa-semi.c b/xtensa-semi.c
index 5754b7782a..b7c8c34564 100644
--- a/xtensa-semi.c
+++ b/xtensa-semi.c
@@ -31,7 +31,7 @@
#include <stddef.h>
#include "cpu.h"
#include "dyngen-exec.h"
-#include "helpers.h"
+#include "helper.h"
#include "qemu-log.h"
enum {
From 7d6b9f0a3838632b4c553e0a387af0bbdf4297c0 Mon Sep 17 00:00:00 2001
From: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri, 16 Mar 2012 01:24:57 +0400
Subject: [PATCH 2/5] target-xtensa: improve unit tests debugging
- add testcase announcement;
- add global symbols for individual tests;
- add host-debug-* makefile target.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
tests/tcg/xtensa/Makefile | 3 +++
tests/tcg/xtensa/macros.inc | 17 +++++++++++++++++
2 files changed, 20 insertions(+)
diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile
index 7e1e619d23..0ff0ccfb8c 100644
--- a/tests/tcg/xtensa/Makefile
+++ b/tests/tcg/xtensa/Makefile
@@ -72,5 +72,8 @@ run-test_fail.tst: test_fail.tst
debug-%.tst: %.tst
$(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$<
+host-debug-%.tst: %.tst
+ gdb --args $(SIM) $(SIMFLAGS) ./$<
+
clean:
$(RM) -fr $(TESTCASES) $(CRT)
diff --git a/tests/tcg/xtensa/macros.inc b/tests/tcg/xtensa/macros.inc
index 2d4515e14f..23bf3e96c8 100644
--- a/tests/tcg/xtensa/macros.inc
+++ b/tests/tcg/xtensa/macros.inc
@@ -29,7 +29,24 @@ main:
exit
.endm
+.macro print text
+.data
+97: .ascii "\text\n"
+98:
+ .align 4
+.text
+ movi a2, 4
+ movi a3, 2
+ movi a4, 97b
+ movi a5, 98b
+ sub a5, a5, a4
+ simcall
+.endm
+
.macro test name
+ //print test_\name
+test_\name:
+.global test_\name
.endm
.macro test_end
From a4633e16d77bd1cf0c25e500d15943499b94f2f9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Wed, 11 Apr 2012 18:24:48 +0200
Subject: [PATCH 3/5] target-xtensa: QOM'ify CPU
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Embed CPUXtensaState as first member of XtensaCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
Makefile.target | 1 +
target-xtensa/cpu-qom.h | 80 +++++++++++++++++++++++++++++++++++++++++
target-xtensa/cpu.c | 69 +++++++++++++++++++++++++++++++++++
target-xtensa/cpu.h | 1 +
target-xtensa/helper.c | 4 ++-
5 files changed, 154 insertions(+), 1 deletion(-)
create mode 100644 target-xtensa/cpu-qom.h
create mode 100644 target-xtensa/cpu.c
diff --git a/Makefile.target b/Makefile.target
index e88b896e38..75b97ae3eb 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -102,6 +102,7 @@ endif
libobj-$(TARGET_SPARC) += int32_helper.o
libobj-$(TARGET_SPARC64) += int64_helper.o
libobj-$(TARGET_UNICORE32) += cpu.o
+libobj-$(TARGET_XTENSA) += cpu.o
libobj-$(TARGET_ALPHA) += int_helper.o fpu_helper.o sys_helper.o mem_helper.o
libobj-y += disas.o
diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h
new file mode 100644
index 0000000000..1fd2f274a1
--- /dev/null
+++ b/target-xtensa/cpu-qom.h
@@ -0,0 +1,80 @@
+/*
+ * QEMU Xtensa CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef QEMU_XTENSA_CPU_QOM_H
+#define QEMU_XTENSA_CPU_QOM_H
+
+#include "qemu/cpu.h"
+#include "cpu.h"
+
+#define TYPE_XTENSA_CPU "xtensa-cpu"
+
+#define XTENSA_CPU_CLASS(class) \
+ OBJECT_CLASS_CHECK(XtensaCPUClass, (class), TYPE_XTENSA_CPU)
+#define XTENSA_CPU(obj) \
+ OBJECT_CHECK(XtensaCPU, (obj), TYPE_XTENSA_CPU)
+#define XTENSA_CPU_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(XtensaCPUClass, (obj), TYPE_XTENSA_CPU)
+
+/**
+ * XtensaCPUClass:
+ * @parent_reset: The parent class' reset handler.
+ *
+ * An Xtensa CPU model.
+ */
+typedef struct XtensaCPUClass {
+ /*< private >*/
+ CPUClass parent_class;
+ /*< public >*/
+
+ void (*parent_reset)(CPUState *cpu);
+} XtensaCPUClass;
+
+/**
+ * XtensaCPU:
+ * @env: #CPUXtensaState
+ *
+ * An Xtensa CPU.
+ */
+typedef struct XtensaCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUXtensaState env;
+} XtensaCPU;
+
+static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
+{
+ return XTENSA_CPU(container_of(env, XtensaCPU, env));
+}
+
+#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
+
+
+#endif
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
new file mode 100644
index 0000000000..d68be226ee
--- /dev/null
+++ b/target-xtensa/cpu.c
@@ -0,0 +1,69 @@
+/*
+ * QEMU Xtensa CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "cpu-qom.h"
+#include "qemu-common.h"
+
+
+/* CPUClass::reset() */
+static void xtensa_cpu_reset(CPUState *s)
+{
+ XtensaCPU *cpu = XTENSA_CPU(s);
+ XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu);
+ CPUXtensaState *env = &cpu->env;
+
+ xcc->parent_reset(s);
+
+ cpu_state_reset(env);
+}
+
+static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
+{
+ CPUClass *cc = CPU_CLASS(oc);
+ XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc);
+
+ xcc->parent_reset = cc->reset;
+ cc->reset = xtensa_cpu_reset;
+}
+
+static const TypeInfo xtensa_cpu_type_info = {
+ .name = TYPE_XTENSA_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(XtensaCPU),
+ .abstract = false,
+ .class_size = sizeof(XtensaCPUClass),
+ .class_init = xtensa_cpu_class_init,
+};
+
+static void xtensa_cpu_register_types(void)
+{
+ type_register_static(&xtensa_cpu_type_info);
+}
+
+type_init(xtensa_cpu_register_types)
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index a7bcf52220..2de5144e5f 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -470,6 +470,7 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
}
#include "cpu-all.h"
+#include "cpu-qom.h"
#include "exec-all.h"
static inline int cpu_has_work(CPUXtensaState *env)
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index dab135c4a9..20338e61c6 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -95,6 +95,7 @@ CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
{
static int tcg_inited;
static int debug_handler_inited;
+ XtensaCPU *cpu;
CPUXtensaState *env;
const XtensaConfig *config = NULL;
XtensaConfigList *core = xtensa_cores;
@@ -109,7 +110,8 @@ CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
return NULL;
}
- env = g_malloc0(sizeof(*env));
+ cpu = XTENSA_CPU(object_new(TYPE_XTENSA_CPU));
+ env = &cpu->env;
env->config = config;
cpu_exec_init(env);
From 5087a72cb3e94f48c1d447babd67e33bfd9dda12 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Wed, 11 Apr 2012 18:24:49 +0200
Subject: [PATCH 4/5] target-xtensa: QOM'ify CPU reset
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move code from cpu_state_reset() into QOM xtensa_cpu_reset().
To avoid moving reset_mmu() and dependencies, make it non-static.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target-xtensa/cpu.c | 12 +++++++++++-
target-xtensa/cpu.h | 1 +
target-xtensa/helper.c | 15 ++-------------
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index d68be226ee..55d2dea266 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -1,6 +1,7 @@
/*
* QEMU Xtensa CPU
*
+ * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
* Copyright (c) 2012 SUSE LINUX Products GmbH
* All rights reserved.
*
@@ -40,7 +41,16 @@ static void xtensa_cpu_reset(CPUState *s)
xcc->parent_reset(s);
- cpu_state_reset(env);
+ env->exception_taken = 0;
+ env->pc = env->config->exception_vector[EXC_RESET];
+ env->sregs[LITBASE] &= ~1;
+ env->sregs[PS] = xtensa_option_enabled(env->config,
+ XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
+ env->sregs[VECBASE] = env->config->vecbase;
+ env->sregs[IBREAKENABLE] = 0;
+
+ env->pending_irq_level = 0;
+ reset_mmu(env);
}
static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 2de5144e5f..6d0ea7c038 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -375,6 +375,7 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
int xtensa_get_physical_addr(CPUXtensaState *env,
uint32_t vaddr, int is_write, int mmu_idx,
uint32_t *paddr, uint32_t *page_size, unsigned *access);
+void reset_mmu(CPUXtensaState *env);
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env);
void debug_exception_env(CPUXtensaState *new_env, uint32_t cause);
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 20338e61c6..000f965d7b 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -33,20 +33,9 @@
#include "hw/loader.h"
#endif
-static void reset_mmu(CPUXtensaState *env);
-
void cpu_state_reset(CPUXtensaState *env)
{
- env->exception_taken = 0;
- env->pc = env->config->exception_vector[EXC_RESET];
- env->sregs[LITBASE] &= ~1;
- env->sregs[PS] = xtensa_option_enabled(env->config,
- XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
- env->sregs[VECBASE] = env->config->vecbase;
- env->sregs[IBREAKENABLE] = 0;
-
- env->pending_irq_level = 0;
- reset_mmu(env);
+ cpu_reset(ENV_GET_CPU(env));
}
static struct XtensaConfigList *xtensa_cores;
@@ -336,7 +325,7 @@ static void reset_tlb_region_way0(CPUXtensaState *env,
}
}
-static void reset_mmu(CPUXtensaState *env)
+void reset_mmu(CPUXtensaState *env)
{
if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
env->sregs[RASID] = 0x04030201;
From e554bbc6892394e506f5995ff4e0ca21cfe04a25 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Wed, 11 Apr 2012 18:24:50 +0200
Subject: [PATCH 5/5] target-xtensa: Start QOM'ifying CPU init
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move XtensaConfig-independent code from cpu_xtensa_init() into a
QOM initfn, as a start.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target-xtensa/cpu.c | 9 +++++++++
target-xtensa/helper.c | 1 -
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index 55d2dea266..97deacb478 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -53,6 +53,14 @@ static void xtensa_cpu_reset(CPUState *s)
reset_mmu(env);
}
+static void xtensa_cpu_initfn(Object *obj)
+{
+ XtensaCPU *cpu = XTENSA_CPU(obj);
+ CPUXtensaState *env = &cpu->env;
+
+ cpu_exec_init(env);
+}
+
static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
{
CPUClass *cc = CPU_CLASS(oc);
@@ -66,6 +74,7 @@ static const TypeInfo xtensa_cpu_type_info = {
.name = TYPE_XTENSA_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(XtensaCPU),
+ .instance_init = xtensa_cpu_initfn,
.abstract = false,
.class_size = sizeof(XtensaCPUClass),
.class_init = xtensa_cpu_class_init,
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 000f965d7b..2094227843 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -102,7 +102,6 @@ CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
cpu = XTENSA_CPU(object_new(TYPE_XTENSA_CPU));
env = &cpu->env;
env->config = config;
- cpu_exec_init(env);
if (!tcg_inited) {
tcg_inited = 1;