mirror of https://gitee.com/openkylin/qemu.git
riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell
Some of the properties only have 1 cell so we should use qemu_fdt_setprop_cell() instead of qemu_fdt_setprop_cells(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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24e398d06b
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04e7edd108
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@ -183,7 +183,7 @@ static void *create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
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qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 0x35);
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 0x35);
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qemu_fdt_setprop_cells(fdt, nodename, "phandle", plic_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "phandle", plic_phandle);
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plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
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plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
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g_free(cells);
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g_free(cells);
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g_free(nodename);
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g_free(nodename);
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@ -208,20 +208,20 @@ static void *create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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0x0, memmap[SIFIVE_U_GEM].size);
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0x0, memmap[SIFIVE_U_GEM].size);
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qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
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qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
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qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii");
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qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii");
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qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
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qemu_fdt_setprop_cells(fdt, nodename, "clocks",
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qemu_fdt_setprop_cells(fdt, nodename, "clocks",
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ethclk_phandle, ethclk_phandle, ethclk_phandle);
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ethclk_phandle, ethclk_phandle, ethclk_phandle);
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qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names,
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qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names,
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sizeof(ethclk_names));
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sizeof(ethclk_names));
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qemu_fdt_setprop_cells(fdt, nodename, "#address-cells", 1);
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qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1);
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qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0);
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qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0);
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g_free(nodename);
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g_free(nodename);
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nodename = g_strdup_printf("/soc/ethernet@%lx/ethernet-phy@0",
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nodename = g_strdup_printf("/soc/ethernet@%lx/ethernet-phy@0",
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(long)memmap[SIFIVE_U_GEM].base);
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(long)memmap[SIFIVE_U_GEM].base);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0);
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qemu_fdt_setprop_cell(fdt, nodename, "reg", 0x0);
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g_free(nodename);
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g_free(nodename);
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uartclk_phandle = phandle++;
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uartclk_phandle = phandle++;
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@ -241,9 +241,9 @@ static void *create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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qemu_fdt_setprop_cells(fdt, nodename, "reg",
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qemu_fdt_setprop_cells(fdt, nodename, "reg",
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0x0, memmap[SIFIVE_U_UART0].base,
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0x0, memmap[SIFIVE_U_UART0].base,
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0x0, memmap[SIFIVE_U_UART0].size);
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0x0, memmap[SIFIVE_U_UART0].size);
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qemu_fdt_setprop_cells(fdt, nodename, "clocks", uartclk_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "clocks", uartclk_phandle);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ);
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qemu_fdt_add_subnode(fdt, "/chosen");
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qemu_fdt_add_subnode(fdt, "/chosen");
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qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
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qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
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@ -233,8 +233,8 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
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nodename = g_strdup_printf("/soc/interrupt-controller@%lx",
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nodename = g_strdup_printf("/soc/interrupt-controller@%lx",
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(long)memmap[VIRT_PLIC].base);
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(long)memmap[VIRT_PLIC].base);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_setprop_cells(fdt, nodename, "#address-cells",
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qemu_fdt_setprop_cell(fdt, nodename, "#address-cells",
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FDT_PLIC_ADDR_CELLS);
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FDT_PLIC_ADDR_CELLS);
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qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells",
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qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells",
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FDT_PLIC_INT_CELLS);
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FDT_PLIC_INT_CELLS);
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qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0");
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qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0");
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@ -247,7 +247,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
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qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
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qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", VIRTIO_NDEV);
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qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", VIRTIO_NDEV);
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qemu_fdt_setprop_cells(fdt, nodename, "phandle", plic_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "phandle", plic_phandle);
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plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
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plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
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g_free(cells);
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g_free(cells);
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g_free(nodename);
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g_free(nodename);
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@ -260,19 +260,19 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
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qemu_fdt_setprop_cells(fdt, nodename, "reg",
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qemu_fdt_setprop_cells(fdt, nodename, "reg",
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0x0, memmap[VIRT_VIRTIO].base + i * memmap[VIRT_VIRTIO].size,
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0x0, memmap[VIRT_VIRTIO].base + i * memmap[VIRT_VIRTIO].size,
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0x0, memmap[VIRT_VIRTIO].size);
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0x0, memmap[VIRT_VIRTIO].size);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupts", VIRTIO_IRQ + i);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupts", VIRTIO_IRQ + i);
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g_free(nodename);
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g_free(nodename);
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}
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}
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nodename = g_strdup_printf("/soc/pci@%lx",
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nodename = g_strdup_printf("/soc/pci@%lx",
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(long) memmap[VIRT_PCIE_ECAM].base);
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(long) memmap[VIRT_PCIE_ECAM].base);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_setprop_cells(fdt, nodename, "#address-cells",
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qemu_fdt_setprop_cell(fdt, nodename, "#address-cells",
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FDT_PCI_ADDR_CELLS);
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FDT_PCI_ADDR_CELLS);
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qemu_fdt_setprop_cells(fdt, nodename, "#interrupt-cells",
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qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells",
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FDT_PCI_INT_CELLS);
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FDT_PCI_INT_CELLS);
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qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0x2);
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qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0x2);
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qemu_fdt_setprop_string(fdt, nodename, "compatible",
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qemu_fdt_setprop_string(fdt, nodename, "compatible",
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"pci-host-ecam-generic");
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"pci-host-ecam-generic");
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qemu_fdt_setprop_string(fdt, nodename, "device_type", "pci");
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qemu_fdt_setprop_string(fdt, nodename, "device_type", "pci");
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@ -309,8 +309,8 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
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0x0, memmap[VIRT_UART0].base,
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0x0, memmap[VIRT_UART0].base,
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0x0, memmap[VIRT_UART0].size);
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0x0, memmap[VIRT_UART0].size);
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qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", 3686400);
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qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", 3686400);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
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qemu_fdt_setprop_cells(fdt, nodename, "interrupts", UART0_IRQ);
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qemu_fdt_setprop_cell(fdt, nodename, "interrupts", UART0_IRQ);
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qemu_fdt_add_subnode(fdt, "/chosen");
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qemu_fdt_add_subnode(fdt, "/chosen");
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qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
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qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
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