mirror of https://gitee.com/openkylin/qemu.git
ioport: Remove unused old dispatching services
Remove unused ioport_register and isa_unassign_ioport along with everything that only those services used. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Jan Kiszka
Paolo Bonzini
parent
b40acf99be
commit
0659097de2
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@ -25,7 +25,6 @@
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#define IOPORT_H
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#include "qemu-common.h"
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#include "exec/iorange.h"
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typedef uint32_t pio_addr_t;
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#define FMT_pioaddr PRIx32
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@ -36,10 +35,6 @@ typedef uint32_t pio_addr_t;
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/* These should really be in isa.h, but are here to make pc.h happy. */
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typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
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typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
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typedef void (IOPortDestructor)(void *opaque);
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void ioport_register(IORange *iorange);
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void isa_unassign_ioport(pio_addr_t start, int length);
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void cpu_outb(pio_addr_t addr, uint8_t val);
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void cpu_outw(pio_addr_t addr, uint16_t val);
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@ -1,31 +0,0 @@
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#ifndef IORANGE_H
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#define IORANGE_H
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#include <stdint.h>
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typedef struct IORange IORange;
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typedef struct IORangeOps IORangeOps;
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struct IORangeOps {
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void (*read)(IORange *iorange, uint64_t offset, unsigned width,
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uint64_t *data);
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void (*write)(IORange *iorange, uint64_t offset, unsigned width,
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uint64_t data);
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void (*destructor)(IORange *iorange);
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};
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struct IORange {
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const IORangeOps *ops;
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uint64_t base;
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uint64_t len;
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};
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static inline void iorange_init(IORange *iorange, const IORangeOps *ops,
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uint64_t base, uint64_t len)
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{
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iorange->ops = ops;
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iorange->base = base;
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iorange->len = len;
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}
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#endif
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@ -24,7 +24,6 @@
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#include "exec/hwaddr.h"
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#endif
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#include "qemu/queue.h"
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#include "exec/iorange.h"
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#include "exec/ioport.h"
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#include "qemu/int128.h"
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#include "qemu/notify.h"
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@ -48,14 +47,6 @@ struct MemoryRegionMmio {
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CPUWriteMemoryFunc *write[3];
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};
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/* Internal use; thunks between old-style IORange and MemoryRegions. */
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typedef struct MemoryRegionIORange MemoryRegionIORange;
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struct MemoryRegionIORange {
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IORange iorange;
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MemoryRegion *mr;
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hwaddr offset;
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};
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typedef struct IOMMUTLBEntry IOMMUTLBEntry;
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/* See address_space_translate: bit 0 is read, bit 1 is write. */
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238
ioport.c
238
ioport.c
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@ -30,18 +30,8 @@
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#include "exec/memory.h"
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#include "exec/address-spaces.h"
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/***********************************************************/
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/* IO Port */
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//#define DEBUG_UNUSED_IOPORT
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//#define DEBUG_IOPORT
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#ifdef DEBUG_UNUSED_IOPORT
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# define LOG_UNUSED_IOPORT(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__)
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#else
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# define LOG_UNUSED_IOPORT(fmt, ...) do{ } while (0)
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#endif
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#ifdef DEBUG_IOPORT
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# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
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#else
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@ -54,234 +44,6 @@ typedef struct MemoryRegionPortioList {
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MemoryRegionPortio ports[];
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} MemoryRegionPortioList;
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/* XXX: use a two level table to limit memory usage */
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static void *ioport_opaque[MAX_IOPORTS];
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static IOPortReadFunc *ioport_read_table[3][MAX_IOPORTS];
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static IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];
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static IOPortDestructor *ioport_destructor_table[MAX_IOPORTS];
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static IOPortReadFunc default_ioport_readb, default_ioport_readw, default_ioport_readl;
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static IOPortWriteFunc default_ioport_writeb, default_ioport_writew, default_ioport_writel;
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static uint32_t ioport_read(int index, uint32_t address)
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{
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static IOPortReadFunc * const default_func[3] = {
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default_ioport_readb,
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default_ioport_readw,
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default_ioport_readl
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};
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IOPortReadFunc *func = ioport_read_table[index][address];
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if (!func)
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func = default_func[index];
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return func(ioport_opaque[address], address);
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}
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static void ioport_write(int index, uint32_t address, uint32_t data)
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{
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static IOPortWriteFunc * const default_func[3] = {
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default_ioport_writeb,
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default_ioport_writew,
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default_ioport_writel
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};
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IOPortWriteFunc *func = ioport_write_table[index][address];
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if (!func)
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func = default_func[index];
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func(ioport_opaque[address], address, data);
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}
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static uint32_t default_ioport_readb(void *opaque, uint32_t address)
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{
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LOG_UNUSED_IOPORT("unused inb: port=0x%04"PRIx32"\n", address);
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return 0xff;
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}
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static void default_ioport_writeb(void *opaque, uint32_t address, uint32_t data)
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{
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LOG_UNUSED_IOPORT("unused outb: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
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address, data);
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}
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/* default is to make two byte accesses */
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static uint32_t default_ioport_readw(void *opaque, uint32_t address)
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{
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uint32_t data;
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data = ioport_read(0, address);
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address = (address + 1) & IOPORTS_MASK;
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data |= ioport_read(0, address) << 8;
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return data;
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}
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static void default_ioport_writew(void *opaque, uint32_t address, uint32_t data)
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{
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ioport_write(0, address, data & 0xff);
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address = (address + 1) & IOPORTS_MASK;
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ioport_write(0, address, (data >> 8) & 0xff);
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}
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static uint32_t default_ioport_readl(void *opaque, uint32_t address)
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{
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LOG_UNUSED_IOPORT("unused inl: port=0x%04"PRIx32"\n", address);
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return 0xffffffff;
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}
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static void default_ioport_writel(void *opaque, uint32_t address, uint32_t data)
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{
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LOG_UNUSED_IOPORT("unused outl: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
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address, data);
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}
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static int ioport_bsize(int size, int *bsize)
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{
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if (size == 1) {
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*bsize = 0;
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} else if (size == 2) {
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*bsize = 1;
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} else if (size == 4) {
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*bsize = 2;
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} else {
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return -1;
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}
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return 0;
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}
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/* size is the word size in byte */
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static int register_ioport_read(pio_addr_t start, int length, int size,
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IOPortReadFunc *func, void *opaque)
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{
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int i, bsize;
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if (ioport_bsize(size, &bsize)) {
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hw_error("register_ioport_read: invalid size");
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return -1;
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}
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for(i = start; i < start + length; ++i) {
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ioport_read_table[bsize][i] = func;
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if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
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hw_error("register_ioport_read: invalid opaque for address 0x%x",
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i);
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ioport_opaque[i] = opaque;
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}
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return 0;
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}
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/* size is the word size in byte */
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static int register_ioport_write(pio_addr_t start, int length, int size,
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IOPortWriteFunc *func, void *opaque)
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{
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int i, bsize;
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if (ioport_bsize(size, &bsize)) {
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hw_error("register_ioport_write: invalid size");
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return -1;
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}
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for(i = start; i < start + length; ++i) {
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ioport_write_table[bsize][i] = func;
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if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
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hw_error("register_ioport_write: invalid opaque for address 0x%x",
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i);
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ioport_opaque[i] = opaque;
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}
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return 0;
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}
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static uint32_t ioport_readb_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 1, &data);
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return data;
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}
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static uint32_t ioport_readw_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 2, &data);
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return data;
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}
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static uint32_t ioport_readl_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 4, &data);
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return data;
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}
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static void ioport_writeb_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 1, data);
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}
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static void ioport_writew_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 2, data);
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}
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static void ioport_writel_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 4, data);
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}
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static void iorange_destructor_thunk(void *opaque)
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{
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IORange *iorange = opaque;
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if (iorange->ops->destructor) {
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iorange->ops->destructor(iorange);
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}
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}
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void ioport_register(IORange *ioport)
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{
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register_ioport_read(ioport->base, ioport->len, 1,
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ioport_readb_thunk, ioport);
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register_ioport_read(ioport->base, ioport->len, 2,
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ioport_readw_thunk, ioport);
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register_ioport_read(ioport->base, ioport->len, 4,
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ioport_readl_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 1,
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ioport_writeb_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 2,
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ioport_writew_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 4,
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ioport_writel_thunk, ioport);
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ioport_destructor_table[ioport->base] = iorange_destructor_thunk;
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}
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void isa_unassign_ioport(pio_addr_t start, int length)
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{
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int i;
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if (ioport_destructor_table[start]) {
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ioport_destructor_table[start](ioport_opaque[start]);
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ioport_destructor_table[start] = NULL;
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}
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for(i = start; i < start + length; i++) {
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ioport_read_table[0][i] = NULL;
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ioport_read_table[1][i] = NULL;
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ioport_read_table[2][i] = NULL;
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ioport_write_table[0][i] = NULL;
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ioport_write_table[1][i] = NULL;
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ioport_write_table[2][i] = NULL;
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ioport_opaque[i] = NULL;
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}
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}
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/***********************************************************/
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void cpu_outb(pio_addr_t addr, uint8_t val)
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{
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LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
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