mirror of https://gitee.com/openkylin/qemu.git
ide/macio: QOM'ify MacIO IDE
It was not qdev'ified before. Turn it into a SysBusDevice. Embed them into the MacIO devices. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Andreas Färber
Alexander Graf
parent
95ed3b7cf1
commit
07a7484e5d
4
hw/ide.h
4
hw/ide.h
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@ -19,10 +19,6 @@ PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
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PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
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void vt82c686b_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
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/* ide-macio.c */
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MemoryRegion *pmac_ide_init (DriveInfo **hd_table, qemu_irq irq,
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void *dbdma, int channel, qemu_irq dma_irq);
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/* ide-mmio.c */
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void mmio_ide_init (hwaddr membase, hwaddr membase2,
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MemoryRegion *address_space,
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@ -33,12 +33,6 @@
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/***********************************************************/
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/* MacIO based PowerPC IDE */
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typedef struct MACIOIDEState {
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MemoryRegion mem;
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IDEBus bus;
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BlockDriverAIOCB *aiocb;
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} MACIOIDEState;
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#define MACIO_PAGE_SIZE 4096
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static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
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@ -321,30 +315,70 @@ static const VMStateDescription vmstate_pmac = {
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}
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};
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static void pmac_ide_reset(void *opaque)
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static void macio_ide_reset(DeviceState *dev)
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{
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MACIOIDEState *d = opaque;
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MACIOIDEState *d = MACIO_IDE(dev);
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ide_bus_reset(&d->bus);
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}
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/* hd_table must contain 4 block drivers */
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/* PowerMac uses memory mapped registers, not I/O. Return the memory
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I/O index to access the ide. */
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MemoryRegion *pmac_ide_init (DriveInfo **hd_table, qemu_irq irq,
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void *dbdma, int channel, qemu_irq dma_irq)
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static void macio_ide_realizefn(DeviceState *dev, Error **errp)
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{
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MACIOIDEState *d;
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MACIOIDEState *s = MACIO_IDE(dev);
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d = g_malloc0(sizeof(MACIOIDEState));
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ide_init2_with_non_qdev_drives(&d->bus, hd_table[0], hd_table[1], irq);
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if (dbdma)
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DBDMA_register_channel(dbdma, channel, dma_irq, pmac_ide_transfer, pmac_ide_flush, d);
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memory_region_init_io(&d->mem, &pmac_ide_ops, d, "pmac-ide", 0x1000);
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vmstate_register(NULL, 0, &vmstate_pmac, d);
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qemu_register_reset(pmac_ide_reset, d);
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return &d->mem;
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ide_init2(&s->bus, s->irq);
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}
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static void macio_ide_initfn(Object *obj)
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{
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SysBusDevice *d = SYS_BUS_DEVICE(obj);
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MACIOIDEState *s = MACIO_IDE(obj);
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ide_bus_new(&s->bus, DEVICE(obj), 0);
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memory_region_init_io(&s->mem, &pmac_ide_ops, s, "pmac-ide", 0x1000);
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sysbus_init_mmio(d, &s->mem);
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sysbus_init_irq(d, &s->irq);
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sysbus_init_irq(d, &s->dma_irq);
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}
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static void macio_ide_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->realize = macio_ide_realizefn;
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dc->reset = macio_ide_reset;
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dc->vmsd = &vmstate_pmac;
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}
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static const TypeInfo macio_ide_type_info = {
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.name = TYPE_MACIO_IDE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(MACIOIDEState),
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.instance_init = macio_ide_initfn,
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.class_init = macio_ide_class_init,
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};
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static void macio_ide_register_types(void)
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{
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type_register_static(&macio_ide_type_info);
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}
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/* hd_table must contain 4 block drivers */
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void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table)
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{
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int i;
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for (i = 0; i < 2; i++) {
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if (hd_table[i]) {
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ide_create_drive(&s->bus, i, hd_table[i]);
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}
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}
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}
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void macio_ide_register_dma(MACIOIDEState *s, void *dbdma, int channel)
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{
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DBDMA_register_channel(dbdma, channel, s->dma_irq,
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pmac_ide_transfer, pmac_ide_flush, s);
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}
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type_init(macio_ide_register_types)
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102
hw/macio.c
102
hw/macio.c
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@ -25,6 +25,7 @@
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#include "hw.h"
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#include "ppc/mac.h"
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#include "pci/pci.h"
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#include "mac_dbdma.h"
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#include "escc.h"
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#define TYPE_MACIO "macio"
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@ -37,12 +38,10 @@ typedef struct MacIOState
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/*< public >*/
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MemoryRegion bar;
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void *dbdma;
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MemoryRegion *pic_mem;
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MemoryRegion *dbdma_mem;
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MemoryRegion *cuda_mem;
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MemoryRegion *escc_mem;
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int nb_ide;
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MemoryRegion *ide_mem[4];
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} MacIOState;
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#define OLDWORLD_MACIO(obj) \
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@ -53,29 +52,33 @@ typedef struct OldWorldMacIOState {
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[2];
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MacIONVRAMState nvram;
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MACIOIDEState ide;
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} OldWorldMacIOState;
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#define NEWWORLD_MACIO(obj) \
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OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
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typedef struct NewWorldMacIOState {
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[4];
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MACIOIDEState ide[2];
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} NewWorldMacIOState;
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static void macio_bar_setup(MacIOState *macio_state)
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{
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int i;
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MemoryRegion *bar = &macio_state->bar;
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if (macio_state->dbdma_mem) {
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memory_region_add_subregion(bar, 0x08000, macio_state->dbdma_mem);
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}
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if (macio_state->escc_mem) {
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memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
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}
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if (macio_state->cuda_mem) {
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memory_region_add_subregion(bar, 0x16000, macio_state->cuda_mem);
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}
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for (i = 0; i < macio_state->nb_ide; i++) {
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if (macio_state->ide_mem[i]) {
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memory_region_add_subregion(bar, 0x1f000 + (i * 0x1000),
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macio_state->ide_mem[i]);
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}
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}
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}
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static int macio_common_initfn(PCIDevice *d)
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@ -114,23 +117,42 @@ static int macio_oldworld_initfn(PCIDevice *d)
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memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
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}
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sysbus_dev = SYS_BUS_DEVICE(&os->ide);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[0]);
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sysbus_connect_irq(sysbus_dev, 1, os->irqs[1]);
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macio_ide_register_dma(&os->ide, s->dbdma, 0x16);
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ret = qdev_init(DEVICE(&os->ide));
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if (ret < 0) {
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return ret;
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}
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return 0;
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}
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static void macio_oldworld_init(Object *obj)
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{
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MacIOState *s = MACIO(obj);
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OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
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DeviceState *dev;
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qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
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object_initialize(&os->nvram, TYPE_MACIO_NVRAM);
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dev = DEVICE(&os->nvram);
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qdev_prop_set_uint32(dev, "size", 0x2000);
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qdev_prop_set_uint32(dev, "it_shift", 4);
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object_initialize(&os->ide, TYPE_MACIO_IDE);
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qdev_set_parent_bus(DEVICE(&os->ide), sysbus_get_default());
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memory_region_add_subregion(&s->bar, 0x1f000 + (1 * 0x1000), &os->ide.mem);
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object_property_add_child(obj, "ide", OBJECT(&os->ide), NULL);
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}
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static int macio_newworld_initfn(PCIDevice *d)
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{
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MacIOState *s = MACIO(d);
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NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
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SysBusDevice *sysbus_dev;
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int ret = macio_common_initfn(d);
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if (ret < 0) {
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return ret;
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@ -141,14 +163,56 @@ static int macio_newworld_initfn(PCIDevice *d)
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memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
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}
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sysbus_dev = SYS_BUS_DEVICE(&ns->ide[0]);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[0]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[1]);
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macio_ide_register_dma(&ns->ide[0], s->dbdma, 0x16);
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ret = qdev_init(DEVICE(&ns->ide[0]));
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if (ret < 0) {
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&ns->ide[1]);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[2]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[3]);
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macio_ide_register_dma(&ns->ide[0], s->dbdma, 0x1a);
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ret = qdev_init(DEVICE(&ns->ide[1]));
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if (ret < 0) {
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return ret;
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}
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return 0;
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}
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static void macio_newworld_init(Object *obj)
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{
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MacIOState *s = MACIO(obj);
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NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
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int i;
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gchar *name;
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qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
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for (i = 0; i < 2; i++) {
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object_initialize(&ns->ide[i], TYPE_MACIO_IDE);
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qdev_set_parent_bus(DEVICE(&ns->ide[i]), sysbus_get_default());
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memory_region_add_subregion(&s->bar, 0x1f000 + ((i + 1) * 0x1000),
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&ns->ide[i].mem);
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name = g_strdup_printf("ide[%i]", i);
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object_property_add_child(obj, name, OBJECT(&ns->ide[i]), NULL);
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g_free(name);
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}
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}
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static void macio_instance_init(Object *obj)
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{
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MacIOState *s = MACIO(obj);
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MemoryRegion *dbdma_mem;
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memory_region_init(&s->bar, "macio", 0x80000);
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s->dbdma = DBDMA_init(&dbdma_mem);
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memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
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}
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static void macio_oldworld_class_init(ObjectClass *oc, void *data)
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@ -186,6 +250,8 @@ static const TypeInfo macio_oldworld_type_info = {
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static const TypeInfo macio_newworld_type_info = {
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.name = TYPE_NEWWORLD_MACIO,
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.parent = TYPE_MACIO,
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.instance_size = sizeof(NewWorldMacIOState),
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.instance_init = macio_newworld_init,
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.class_init = macio_newworld_class_init,
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};
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@ -208,23 +274,15 @@ static void macio_register_types(void)
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type_init(macio_register_types)
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void macio_init(PCIDevice *d,
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MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
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MemoryRegion *pic_mem,
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MemoryRegion *cuda_mem,
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int nb_ide, MemoryRegion **ide_mem,
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MemoryRegion *escc_mem)
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{
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MacIOState *macio_state = MACIO(d);
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int i;
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macio_state->pic_mem = pic_mem;
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macio_state->dbdma_mem = dbdma_mem;
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macio_state->cuda_mem = cuda_mem;
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macio_state->escc_mem = escc_mem;
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if (nb_ide > 4)
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nb_ide = 4;
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macio_state->nb_ide = nb_ide;
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for (i = 0; i < nb_ide; i++)
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macio_state->ide_mem[i] = ide_mem[i];
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/* Note: this code is strongly inspirated from the corresponding code
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in PearPC */
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25
hw/ppc/mac.h
25
hw/ppc/mac.h
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@ -27,6 +27,7 @@
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#include "exec/memory.h"
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#include "hw/sysbus.h"
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#include "hw/ide/internal.h"
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/* SMP is not enabled, for now */
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#define MAX_CPUS 1
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@ -48,10 +49,30 @@ void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq);
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/* MacIO */
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#define TYPE_OLDWORLD_MACIO "macio-oldworld"
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#define TYPE_NEWWORLD_MACIO "macio-newworld"
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#define TYPE_MACIO_IDE "macio-ide"
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#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
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typedef struct MACIOIDEState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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qemu_irq irq;
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qemu_irq dma_irq;
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MemoryRegion mem;
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IDEBus bus;
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BlockDriverAIOCB *aiocb;
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} MACIOIDEState;
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void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
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void macio_ide_register_dma(MACIOIDEState *ide, void *dbdma, int channel);
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void macio_init(PCIDevice *dev,
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MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
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MemoryRegion *pic_mem,
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MemoryRegion *cuda_mem,
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int nb_ide, MemoryRegion **ide_mem, MemoryRegion *escc_mem);
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MemoryRegion *escc_mem);
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/* Heathrow PIC */
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qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
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@ -148,15 +148,14 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
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long kernel_size, initrd_size;
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PCIBus *pci_bus;
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PCIDevice *macio;
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MACIOIDEState *macio_ide;
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MacIONVRAMState *nvr;
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int bios_size;
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MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
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MemoryRegion *pic_mem, *cuda_mem, *escc_mem;
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MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
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MemoryRegion *ide_mem[3];
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int ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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void *dbdma;
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int machine_arch;
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SysBusDevice *s;
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DeviceState *dev;
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@ -363,12 +362,6 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
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pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
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ide_drive_get(hd, MAX_IDE_BUS);
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dbdma = DBDMA_init(&dbdma_mem);
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/* We only emulate 2 out of 3 IDE controllers for now */
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ide_mem[0] = NULL;
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ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
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ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
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cuda_init(&cuda_mem, pic[0x19]);
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@ -376,8 +369,21 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
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adb_mouse_init(&adb_bus);
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macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO);
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macio_init(macio, pic_mem,
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dbdma_mem, cuda_mem, 3, ide_mem, escc_bar);
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dev = DEVICE(macio);
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qdev_connect_gpio_out(dev, 0, pic[0x0d]); /* IDE */
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qdev_connect_gpio_out(dev, 1, pic[0x02]); /* IDE DMA */
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qdev_connect_gpio_out(dev, 2, pic[0x0e]); /* IDE */
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qdev_connect_gpio_out(dev, 3, pic[0x02]); /* IDE DMA */
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macio_init(macio, pic_mem, cuda_mem, escc_bar);
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/* We only emulate 2 out of 3 IDE controllers for now */
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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"ide[0]"));
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macio_ide_init_drives(macio_ide, hd);
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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"ide[1]"));
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macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
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if (usb_enabled(machine_arch == ARCH_MAC99_U3)) {
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pci_create_simple(pci_bus, -1, "pci-ohci");
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|
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@ -27,7 +27,6 @@
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|||
#include "hw/ppc.h"
|
||||
#include "mac.h"
|
||||
#include "hw/adb.h"
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||||
#include "hw/mac_dbdma.h"
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||||
#include "hw/nvram.h"
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||||
#include "sysemu/sysemu.h"
|
||||
#include "net/net.h"
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||||
|
|
@ -91,13 +90,14 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
|
|||
int32_t kernel_size, initrd_size;
|
||||
PCIBus *pci_bus;
|
||||
PCIDevice *macio;
|
||||
MACIOIDEState *macio_ide;
|
||||
DeviceState *dev;
|
||||
int bios_size;
|
||||
MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
|
||||
MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
|
||||
MemoryRegion *pic_mem, *cuda_mem;
|
||||
MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
|
||||
uint16_t ppc_boot_device;
|
||||
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
|
||||
void *fw_cfg;
|
||||
void *dbdma;
|
||||
|
||||
linux_boot = (kernel_filename != NULL);
|
||||
|
||||
|
|
@ -263,17 +263,6 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
|
|||
|
||||
ide_drive_get(hd, MAX_IDE_BUS);
|
||||
|
||||
/* First IDE channel is a MAC IDE on the MacIO bus */
|
||||
dbdma = DBDMA_init(&dbdma_mem);
|
||||
ide_mem[0] = NULL;
|
||||
ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
|
||||
|
||||
/* Second IDE channel is a CMD646 on the PCI bus */
|
||||
hd[0] = hd[MAX_IDE_DEVS];
|
||||
hd[1] = hd[MAX_IDE_DEVS + 1];
|
||||
hd[3] = hd[2] = NULL;
|
||||
pci_cmd646_ide_init(pci_bus, hd, 0);
|
||||
|
||||
/* cuda also initialize ADB */
|
||||
cuda_init(&cuda_mem, pic[0x12]);
|
||||
|
||||
|
|
@ -281,8 +270,21 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
|
|||
adb_mouse_init(&adb_bus);
|
||||
|
||||
macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
|
||||
macio_init(macio, pic_mem,
|
||||
dbdma_mem, cuda_mem, 2, ide_mem, escc_bar);
|
||||
dev = DEVICE(macio);
|
||||
qdev_connect_gpio_out(dev, 0, pic[0x0D]); /* IDE */
|
||||
qdev_connect_gpio_out(dev, 1, pic[0x02]); /* IDE DMA */
|
||||
macio_init(macio, pic_mem, cuda_mem, escc_bar);
|
||||
|
||||
/* First IDE channel is a MAC IDE on the MacIO bus */
|
||||
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
|
||||
"ide"));
|
||||
macio_ide_init_drives(macio_ide, hd);
|
||||
|
||||
/* Second IDE channel is a CMD646 on the PCI bus */
|
||||
hd[0] = hd[MAX_IDE_DEVS];
|
||||
hd[1] = hd[MAX_IDE_DEVS + 1];
|
||||
hd[3] = hd[2] = NULL;
|
||||
pci_cmd646_ide_init(pci_bus, hd, 0);
|
||||
|
||||
if (usb_enabled(false)) {
|
||||
pci_create_simple(pci_bus, -1, "pci-ohci");
|
||||
|
|
|
|||
Loading…
Reference in New Issue