mirror of https://gitee.com/openkylin/qemu.git
tcg: Add helpers for clrsb
The number of actual invocations does not warrent an opcode, and the backends generating it. But at least we can eliminate redundant helpers. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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4ac7691073
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086920c2c8
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@ -121,6 +121,16 @@ uint64_t HELPER(ctz_i64)(uint64_t arg, uint64_t zero_val)
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return arg ? ctz64(arg) : zero_val;
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}
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uint32_t HELPER(clrsb_i32)(uint32_t arg)
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{
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return clrsb32(arg);
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}
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uint64_t HELPER(clrsb_i64)(uint64_t arg)
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{
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return clrsb64(arg);
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}
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void HELPER(exit_atomic)(CPUArchState *env)
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{
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cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC());
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28
tcg/tcg-op.c
28
tcg/tcg-op.c
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@ -536,6 +536,20 @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
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tcg_temp_free_i32(t);
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}
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void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg)
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{
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if (TCG_TARGET_HAS_clz_i32) {
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TCGv_i32 t = tcg_temp_new_i32();
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tcg_gen_sari_i32(t, arg, 31);
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tcg_gen_xor_i32(t, t, arg);
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tcg_gen_clzi_i32(t, t, 32);
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tcg_gen_subi_i32(ret, t, 1);
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tcg_temp_free_i32(t);
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} else {
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gen_helper_clrsb_i32(ret, arg);
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}
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}
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void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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if (TCG_TARGET_HAS_rot_i32) {
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@ -1846,6 +1860,20 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
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}
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}
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void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg)
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{
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if (TCG_TARGET_HAS_clz_i64 || TCG_TARGET_HAS_clz_i32) {
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TCGv_i64 t = tcg_temp_new_i64();
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tcg_gen_sari_i64(t, arg, 63);
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tcg_gen_xor_i64(t, t, arg);
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tcg_gen_clzi_i64(t, t, 64);
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tcg_gen_subi_i64(ret, t, 1);
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tcg_temp_free_i64(t);
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} else {
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gen_helper_clrsb_i64(ret, arg);
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}
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}
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void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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if (TCG_TARGET_HAS_rot_i64) {
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@ -290,6 +290,7 @@ void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
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void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
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void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
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void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
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void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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@ -477,6 +478,7 @@ void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
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void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
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void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
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void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
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void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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@ -970,6 +972,7 @@ void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
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#define tcg_gen_ctz_tl tcg_gen_ctz_i64
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#define tcg_gen_clzi_tl tcg_gen_clzi_i64
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#define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
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#define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
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#define tcg_gen_rotl_tl tcg_gen_rotl_i64
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#define tcg_gen_rotli_tl tcg_gen_rotli_i64
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#define tcg_gen_rotr_tl tcg_gen_rotr_i64
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@ -1065,6 +1068,7 @@ void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
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#define tcg_gen_ctz_tl tcg_gen_ctz_i32
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#define tcg_gen_clzi_tl tcg_gen_clzi_i32
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#define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
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#define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
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#define tcg_gen_rotl_tl tcg_gen_rotl_i32
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#define tcg_gen_rotli_tl tcg_gen_rotli_i32
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#define tcg_gen_rotr_tl tcg_gen_rotr_i32
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@ -19,6 +19,8 @@ DEF_HELPER_FLAGS_2(clz_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32)
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DEF_HELPER_FLAGS_2(ctz_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32)
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DEF_HELPER_FLAGS_2(clz_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_FLAGS_2(ctz_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_FLAGS_1(clrsb_i32, TCG_CALL_NO_RWG_SE, i32, i32)
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DEF_HELPER_FLAGS_1(clrsb_i64, TCG_CALL_NO_RWG_SE, i64, i64)
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DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env)
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