mirror of https://gitee.com/openkylin/qemu.git
target-s390: Convert NC, XC, OC, TR, UNPK
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
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af9e5a04ea
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0a94903959
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@ -54,6 +54,7 @@
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C(0xb980, NGR, RRE, Z, r1, r2, r1, 0, and, nz64)
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C(0xb980, NGR, RRE, Z, r1, r2, r1, 0, and, nz64)
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C(0xb9e4, NGRK, RRF_a, DO, r2, r3, r1, 0, and, nz64)
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C(0xb9e4, NGRK, RRF_a, DO, r2, r3, r1, 0, and, nz64)
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C(0xe380, NG, RXY_a, Z, r1, m2_64, r1, 0, and, nz64)
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C(0xe380, NG, RXY_a, Z, r1, m2_64, r1, 0, and, nz64)
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C(0xd400, NC, SS_a, Z, la1, a2, 0, 0, nc, 0)
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/* AND IMMEDIATE */
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/* AND IMMEDIATE */
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D(0xc00a, NIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, andi, 0, 0x2020)
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D(0xc00a, NIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, andi, 0, 0x2020)
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D(0xc00b, NILF, RIL_a, EI, r1_o, i2_32u, r1, 0, andi, 0, 0x2000)
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D(0xc00b, NILF, RIL_a, EI, r1_o, i2_32u, r1, 0, andi, 0, 0x2000)
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@ -161,6 +162,7 @@
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C(0xb982, XGR, RRE, Z, r1, r2, r1, 0, xor, nz64)
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C(0xb982, XGR, RRE, Z, r1, r2, r1, 0, xor, nz64)
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C(0xb9e7, XGRK, RRF_a, DO, r2, r3, r1, 0, xor, nz64)
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C(0xb9e7, XGRK, RRF_a, DO, r2, r3, r1, 0, xor, nz64)
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C(0xe382, XG, RXY_a, Z, r1, m2_64, r1, 0, xor, nz64)
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C(0xe382, XG, RXY_a, Z, r1, m2_64, r1, 0, xor, nz64)
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C(0xd700, XC, SS_a, Z, la1, a2, 0, 0, xc, 0)
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/* EXCLUSIVE OR IMMEDIATE */
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/* EXCLUSIVE OR IMMEDIATE */
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D(0xc006, XIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2020)
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D(0xc006, XIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2020)
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D(0xc007, XILF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2000)
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D(0xc007, XILF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2000)
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@ -332,6 +334,7 @@
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C(0xb981, OGR, RRE, Z, r1, r2, r1, 0, or, nz64)
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C(0xb981, OGR, RRE, Z, r1, r2, r1, 0, or, nz64)
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C(0xb9e6, OGRK, RRF_a, DO, r2, r3, r1, 0, or, nz64)
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C(0xb9e6, OGRK, RRF_a, DO, r2, r3, r1, 0, or, nz64)
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C(0xe381, OG, RXY_a, Z, r1, m2_64, r1, 0, or, nz64)
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C(0xe381, OG, RXY_a, Z, r1, m2_64, r1, 0, or, nz64)
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C(0xd600, OC, SS_a, Z, la1, a2, 0, 0, oc, 0)
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/* OR IMMEDIATE */
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/* OR IMMEDIATE */
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D(0xc00c, OIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, ori, 0, 0x2020)
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D(0xc00c, OIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, ori, 0, 0x2020)
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D(0xc00d, OILF, RIL_a, EI, r1_o, i2_32u, r1, 0, ori, 0, 0x2000)
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D(0xc00d, OILF, RIL_a, EI, r1_o, i2_32u, r1, 0, ori, 0, 0x2000)
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@ -444,6 +447,14 @@
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D(0xa700, TMLH, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 16)
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D(0xa700, TMLH, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 16)
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D(0xa701, TMLL, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 0)
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D(0xa701, TMLL, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 0)
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/* TRANSLATE */
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C(0xdc00, TR, SS_a, Z, la1, a2, 0, 0, tr, 0)
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/* UNPACK */
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/* Really format SS_b, but we pack both lengths into one argument
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for the helper call, so we might as well leave one 8-bit field. */
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C(0xf300, UNPK, SS_a, Z, la1, a2, 0, 0, unpk, 0)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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/* DIAGNOSE (KVM hypercall) */
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/* DIAGNOSE (KVM hypercall) */
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C(0x8300, DIAG, RX_a, Z, 0, 0, 0, 0, diag, 0)
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C(0x8300, DIAG, RX_a, Z, 0, 0, 0, 0, diag, 0)
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@ -2063,7 +2063,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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unsigned char opc;
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unsigned char opc;
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uint64_t insn;
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uint64_t insn;
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int op, r1, r2, r3, d1, d2, x2, b1, b2, r1b;
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int op, r1, r2, r3, d1, d2, x2, b1, b2, r1b;
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TCGv_i32 vl;
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opc = cpu_ldub_code(env, s->pc);
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opc = cpu_ldub_code(env, s->pc);
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LOG_DISAS("opc 0x%x\n", opc);
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LOG_DISAS("opc 0x%x\n", opc);
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@ -2201,51 +2200,15 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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tcg_temp_free_i32(tmp32_1);
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tcg_temp_free_i32(tmp32_1);
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tcg_temp_free_i32(tmp32_2);
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tcg_temp_free_i32(tmp32_2);
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break;
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break;
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case 0xd4: /* NC D1(L,B1),D2(B2) [SS] */
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case 0xd5: /* CLC D1(L,B1),D2(B2) [SS] */
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case 0xd5: /* CLC D1(L,B1),D2(B2) [SS] */
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case 0xd6: /* OC D1(L,B1),D2(B2) [SS] */
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case 0xd7: /* XC D1(L,B1),D2(B2) [SS] */
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case 0xdc: /* TR D1(L,B1),D2(B2) [SS] */
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case 0xf3: /* UNPK D1(L1,B1),D2(L2,B2) [SS] */
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insn = ld_code6(env, s->pc);
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insn = ld_code6(env, s->pc);
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vl = tcg_const_i32((insn >> 32) & 0xff);
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b1 = (insn >> 28) & 0xf;
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b1 = (insn >> 28) & 0xf;
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b2 = (insn >> 12) & 0xf;
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b2 = (insn >> 12) & 0xf;
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d1 = (insn >> 16) & 0xfff;
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d1 = (insn >> 16) & 0xfff;
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d2 = insn & 0xfff;
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d2 = insn & 0xfff;
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tmp = get_address(s, 0, b1, d1);
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tmp = get_address(s, 0, b1, d1);
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tmp2 = get_address(s, 0, b2, d2);
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tmp2 = get_address(s, 0, b2, d2);
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switch (opc) {
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gen_op_clc(s, (insn >> 32) & 0xff, tmp, tmp2);
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case 0xd4:
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potential_page_fault(s);
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gen_helper_nc(cc_op, cpu_env, vl, tmp, tmp2);
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set_cc_static(s);
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break;
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case 0xd5:
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gen_op_clc(s, (insn >> 32) & 0xff, tmp, tmp2);
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break;
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case 0xd6:
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potential_page_fault(s);
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gen_helper_oc(cc_op, cpu_env, vl, tmp, tmp2);
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set_cc_static(s);
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break;
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case 0xd7:
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potential_page_fault(s);
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gen_helper_xc(cc_op, cpu_env, vl, tmp, tmp2);
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set_cc_static(s);
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break;
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case 0xdc:
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potential_page_fault(s);
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gen_helper_tr(cpu_env, vl, tmp, tmp2);
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set_cc_static(s);
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break;
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case 0xf3:
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potential_page_fault(s);
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gen_helper_unpk(cpu_env, vl, tmp, tmp2);
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break;
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default:
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tcg_abort();
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}
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i64(tmp2);
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break;
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break;
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@ -3206,12 +3169,32 @@ static ExitStatus op_nabs(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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static ExitStatus op_nc(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1));
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potential_page_fault(s);
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gen_helper_nc(cc_op, cpu_env, l, o->addr1, o->in2);
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tcg_temp_free_i32(l);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_neg(DisasContext *s, DisasOps *o)
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static ExitStatus op_neg(DisasContext *s, DisasOps *o)
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{
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{
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tcg_gen_neg_i64(o->out, o->in2);
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tcg_gen_neg_i64(o->out, o->in2);
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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static ExitStatus op_oc(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1));
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potential_page_fault(s);
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gen_helper_oc(cc_op, cpu_env, l, o->addr1, o->in2);
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tcg_temp_free_i32(l);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_or(DisasContext *s, DisasOps *o)
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static ExitStatus op_or(DisasContext *s, DisasOps *o)
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{
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{
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tcg_gen_or_i64(o->out, o->in1, o->in2);
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tcg_gen_or_i64(o->out, o->in1, o->in2);
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@ -3446,6 +3429,35 @@ static ExitStatus op_svc(DisasContext *s, DisasOps *o)
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return EXIT_NORETURN;
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return EXIT_NORETURN;
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}
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}
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static ExitStatus op_tr(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1));
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potential_page_fault(s);
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gen_helper_tr(cpu_env, l, o->addr1, o->in2);
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tcg_temp_free_i32(l);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_unpk(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1));
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potential_page_fault(s);
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gen_helper_unpk(cpu_env, l, o->addr1, o->in2);
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tcg_temp_free_i32(l);
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return NO_EXIT;
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}
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static ExitStatus op_xc(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1));
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potential_page_fault(s);
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gen_helper_xc(cc_op, cpu_env, l, o->addr1, o->in2);
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tcg_temp_free_i32(l);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_xor(DisasContext *s, DisasOps *o)
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static ExitStatus op_xor(DisasContext *s, DisasOps *o)
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{
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{
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tcg_gen_xor_i64(o->out, o->in1, o->in2);
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tcg_gen_xor_i64(o->out, o->in1, o->in2);
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