mirror of https://gitee.com/openkylin/qemu.git
pseries: Implement HPT resizing
This patch implements hypercalls allowing a PAPR guest to resize its own hash page table. This will eventually allow for more flexible memory hotplug. The implementation is partially asynchronous, handled in a special thread running the hpt_prepare_thread() function. The state of a pending resize is stored in SPAPR_MACHINE->pending_hpt. The H_RESIZE_HPT_PREPARE hypercall will kick off creation of a new HPT, or, if one is already in progress, monitor it for completion. If there is an existing HPT resize in progress that doesn't match the size specified in the call, it will cancel it, replacing it with a new one matching the given size. The H_RESIZE_HPT_COMMIT completes transition to a resized HPT, and can only be called successfully once H_RESIZE_HPT_PREPARE has successfully completed initialization of a new HPT. The guest must ensure that there are no concurrent accesses to the existing HPT while this is called (this effectively means stop_machine() for Linux guests). For now H_RESIZE_HPT_COMMIT goes through the whole old HPT, rehashing each HPTE into the new HPT. This can have quite high latency, but it seems to be of the order of typical migration downtime latencies for HPTs of size up to ~2GiB (which would be used in a 256GiB guest). In future we probably want to move more of the rehashing to the "prepare" phase, by having H_ENTER and other hcalls update both current and pending HPTs. That's a project for another day, but should be possible without any changes to the guest interface. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
David Gibson
parent
30f4b05bd0
commit
0b0b831016
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@ -98,8 +98,6 @@
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#define PHANDLE_XICP 0x00001111
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#define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
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static ICSState *spapr_ics_create(sPAPRMachineState *spapr,
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const char *type_ics,
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int nr_irqs, Error **errp)
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@ -1269,7 +1267,7 @@ static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex,
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}
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}
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static int spapr_hpt_shift_for_ramsize(uint64_t ramsize)
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int spapr_hpt_shift_for_ramsize(uint64_t ramsize)
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{
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int shift;
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@ -3,6 +3,7 @@
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#include "sysemu/hw_accel.h"
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#include "sysemu/sysemu.h"
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#include "qemu/log.h"
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#include "qemu/error-report.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "helper_regs.h"
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@ -354,20 +355,291 @@ static target_ulong h_read(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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return H_SUCCESS;
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}
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struct sPAPRPendingHPT {
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/* These fields are read-only after initialization */
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int shift;
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QemuThread thread;
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/* These fields are protected by the BQL */
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bool complete;
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/* These fields are private to the preparation thread if
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* !complete, otherwise protected by the BQL */
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int ret;
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void *hpt;
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};
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static void free_pending_hpt(sPAPRPendingHPT *pending)
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{
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if (pending->hpt) {
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qemu_vfree(pending->hpt);
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}
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g_free(pending);
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}
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static void *hpt_prepare_thread(void *opaque)
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{
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sPAPRPendingHPT *pending = opaque;
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size_t size = 1ULL << pending->shift;
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pending->hpt = qemu_memalign(size, size);
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if (pending->hpt) {
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memset(pending->hpt, 0, size);
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pending->ret = H_SUCCESS;
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} else {
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pending->ret = H_NO_MEM;
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}
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qemu_mutex_lock_iothread();
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if (SPAPR_MACHINE(qdev_get_machine())->pending_hpt == pending) {
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/* Ready to go */
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pending->complete = true;
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} else {
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/* We've been cancelled, clean ourselves up */
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free_pending_hpt(pending);
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}
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qemu_mutex_unlock_iothread();
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return NULL;
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}
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/* Must be called with BQL held */
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static void cancel_hpt_prepare(sPAPRMachineState *spapr)
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{
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sPAPRPendingHPT *pending = spapr->pending_hpt;
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/* Let the thread know it's cancelled */
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spapr->pending_hpt = NULL;
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if (!pending) {
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/* Nothing to do */
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return;
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}
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if (!pending->complete) {
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/* thread will clean itself up */
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return;
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}
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free_pending_hpt(pending);
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}
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static target_ulong h_resize_hpt_prepare(PowerPCCPU *cpu,
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sPAPRMachineState *spapr,
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target_ulong opcode,
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target_ulong *args)
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{
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target_ulong flags = args[0];
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target_ulong shift = args[1];
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int shift = args[1];
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sPAPRPendingHPT *pending = spapr->pending_hpt;
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uint64_t current_ram_size = MACHINE(spapr)->ram_size;
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if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) {
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return H_AUTHORITY;
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}
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if (!spapr->htab_shift) {
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/* Radix guest, no HPT */
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return H_NOT_AVAILABLE;
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}
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trace_spapr_h_resize_hpt_prepare(flags, shift);
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if (flags != 0) {
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return H_PARAMETER;
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}
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if (shift && ((shift < 18) || (shift > 46))) {
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return H_PARAMETER;
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}
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current_ram_size = pc_existing_dimms_capacity(&error_fatal);
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/* We only allow the guest to allocate an HPT one order above what
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* we'd normally give them (to stop a small guest claiming a huge
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* chunk of resources in the HPT */
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if (shift > (spapr_hpt_shift_for_ramsize(current_ram_size) + 1)) {
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return H_RESOURCE;
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}
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if (pending) {
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/* something already in progress */
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if (pending->shift == shift) {
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/* and it's suitable */
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if (pending->complete) {
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return pending->ret;
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} else {
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return H_LONG_BUSY_ORDER_100_MSEC;
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}
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}
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/* not suitable, cancel and replace */
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cancel_hpt_prepare(spapr);
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}
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if (!shift) {
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/* nothing to do */
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return H_SUCCESS;
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}
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/* start new prepare */
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pending = g_new0(sPAPRPendingHPT, 1);
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pending->shift = shift;
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pending->ret = H_HARDWARE;
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qemu_thread_create(&pending->thread, "sPAPR HPT prepare",
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hpt_prepare_thread, pending, QEMU_THREAD_DETACHED);
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spapr->pending_hpt = pending;
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/* In theory we could estimate the time more accurately based on
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* the new size, but there's not much point */
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return H_LONG_BUSY_ORDER_100_MSEC;
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}
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static uint64_t new_hpte_load0(void *htab, uint64_t pteg, int slot)
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{
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uint8_t *addr = htab;
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addr += pteg * HASH_PTEG_SIZE_64;
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addr += slot * HASH_PTE_SIZE_64;
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return ldq_p(addr);
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}
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static void new_hpte_store(void *htab, uint64_t pteg, int slot,
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uint64_t pte0, uint64_t pte1)
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{
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uint8_t *addr = htab;
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addr += pteg * HASH_PTEG_SIZE_64;
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addr += slot * HASH_PTE_SIZE_64;
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stq_p(addr, pte0);
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stq_p(addr + HASH_PTE_SIZE_64 / 2, pte1);
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}
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static int rehash_hpte(PowerPCCPU *cpu,
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const ppc_hash_pte64_t *hptes,
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void *old_hpt, uint64_t oldsize,
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void *new_hpt, uint64_t newsize,
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uint64_t pteg, int slot)
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{
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uint64_t old_hash_mask = (oldsize >> 7) - 1;
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uint64_t new_hash_mask = (newsize >> 7) - 1;
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target_ulong pte0 = ppc_hash64_hpte0(cpu, hptes, slot);
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target_ulong pte1;
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uint64_t avpn;
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unsigned base_pg_shift;
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uint64_t hash, new_pteg, replace_pte0;
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if (!(pte0 & HPTE64_V_VALID) || !(pte0 & HPTE64_V_BOLTED)) {
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return H_SUCCESS;
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}
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pte1 = ppc_hash64_hpte1(cpu, hptes, slot);
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base_pg_shift = ppc_hash64_hpte_page_shift_noslb(cpu, pte0, pte1);
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assert(base_pg_shift); /* H_ENTER shouldn't allow a bad encoding */
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avpn = HPTE64_V_AVPN_VAL(pte0) & ~(((1ULL << base_pg_shift) - 1) >> 23);
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if (pte0 & HPTE64_V_SECONDARY) {
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pteg = ~pteg;
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}
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if ((pte0 & HPTE64_V_SSIZE) == HPTE64_V_SSIZE_256M) {
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uint64_t offset, vsid;
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/* We only have 28 - 23 bits of offset in avpn */
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offset = (avpn & 0x1f) << 23;
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vsid = avpn >> 5;
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/* We can find more bits from the pteg value */
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if (base_pg_shift < 23) {
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offset |= ((vsid ^ pteg) & old_hash_mask) << base_pg_shift;
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}
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hash = vsid ^ (offset >> base_pg_shift);
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} else if ((pte0 & HPTE64_V_SSIZE) == HPTE64_V_SSIZE_1T) {
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uint64_t offset, vsid;
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/* We only have 40 - 23 bits of seg_off in avpn */
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offset = (avpn & 0x1ffff) << 23;
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vsid = avpn >> 17;
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if (base_pg_shift < 23) {
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offset |= ((vsid ^ (vsid << 25) ^ pteg) & old_hash_mask)
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<< base_pg_shift;
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}
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hash = vsid ^ (vsid << 25) ^ (offset >> base_pg_shift);
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} else {
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error_report("rehash_pte: Bad segment size in HPTE");
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return H_HARDWARE;
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}
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new_pteg = hash & new_hash_mask;
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if (pte0 & HPTE64_V_SECONDARY) {
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assert(~pteg == (hash & old_hash_mask));
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new_pteg = ~new_pteg;
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} else {
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assert(pteg == (hash & old_hash_mask));
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}
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assert((oldsize != newsize) || (pteg == new_pteg));
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replace_pte0 = new_hpte_load0(new_hpt, new_pteg, slot);
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/*
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* Strictly speaking, we don't need all these tests, since we only
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* ever rehash bolted HPTEs. We might in future handle non-bolted
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* HPTEs, though so make the logic correct for those cases as
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* well.
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*/
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if (replace_pte0 & HPTE64_V_VALID) {
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assert(newsize < oldsize);
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if (replace_pte0 & HPTE64_V_BOLTED) {
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if (pte0 & HPTE64_V_BOLTED) {
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/* Bolted collision, nothing we can do */
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return H_PTEG_FULL;
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} else {
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/* Discard this hpte */
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return H_SUCCESS;
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}
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}
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}
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new_hpte_store(new_hpt, new_pteg, slot, pte0, pte1);
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return H_SUCCESS;
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}
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static int rehash_hpt(PowerPCCPU *cpu,
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void *old_hpt, uint64_t oldsize,
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void *new_hpt, uint64_t newsize)
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{
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uint64_t n_ptegs = oldsize >> 7;
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uint64_t pteg;
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int slot;
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int rc;
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for (pteg = 0; pteg < n_ptegs; pteg++) {
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hwaddr ptex = pteg * HPTES_PER_GROUP;
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const ppc_hash_pte64_t *hptes
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= ppc_hash64_map_hptes(cpu, ptex, HPTES_PER_GROUP);
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if (!hptes) {
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return H_HARDWARE;
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}
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for (slot = 0; slot < HPTES_PER_GROUP; slot++) {
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rc = rehash_hpte(cpu, hptes, old_hpt, oldsize, new_hpt, newsize,
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pteg, slot);
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if (rc != H_SUCCESS) {
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ppc_hash64_unmap_hptes(cpu, hptes, ptex, HPTES_PER_GROUP);
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return rc;
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}
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}
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ppc_hash64_unmap_hptes(cpu, hptes, ptex, HPTES_PER_GROUP);
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}
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return H_SUCCESS;
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}
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static target_ulong h_resize_hpt_commit(PowerPCCPU *cpu,
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@ -377,13 +649,49 @@ static target_ulong h_resize_hpt_commit(PowerPCCPU *cpu,
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{
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target_ulong flags = args[0];
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target_ulong shift = args[1];
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sPAPRPendingHPT *pending = spapr->pending_hpt;
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int rc;
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size_t newsize;
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if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) {
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return H_AUTHORITY;
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}
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trace_spapr_h_resize_hpt_commit(flags, shift);
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return H_HARDWARE;
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if (flags != 0) {
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return H_PARAMETER;
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}
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if (!pending || (pending->shift != shift)) {
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/* no matching prepare */
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return H_CLOSED;
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}
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if (!pending->complete) {
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/* prepare has not completed */
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return H_BUSY;
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}
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/* Shouldn't have got past PREPARE without an HPT */
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g_assert(spapr->htab_shift);
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newsize = 1ULL << pending->shift;
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rc = rehash_hpt(cpu, spapr->htab, HTAB_SIZE(spapr),
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pending->hpt, newsize);
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if (rc == H_SUCCESS) {
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qemu_vfree(spapr->htab);
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spapr->htab = pending->hpt;
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spapr->htab_shift = pending->shift;
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pending->hpt = NULL; /* so it's not free()d */
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}
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/* Clean up */
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spapr->pending_hpt = NULL;
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free_pending_hpt(pending);
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return rc;
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}
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static target_ulong h_set_sprg0(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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@ -13,6 +13,7 @@ struct sPAPRPHBState;
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struct sPAPRNVRAM;
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typedef struct sPAPREventLogEntry sPAPREventLogEntry;
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typedef struct sPAPREventSource sPAPREventSource;
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typedef struct sPAPRPendingHPT sPAPRPendingHPT;
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#define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL
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#define SPAPR_ENTRY_POINT 0x100
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@ -85,6 +86,8 @@ struct sPAPRMachineState {
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void *htab;
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uint32_t htab_shift;
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uint64_t patb_entry; /* Process tbl registed in H_REGISTER_PROCESS_TABLE */
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sPAPRPendingHPT *pending_hpt; /* in-progress resize */
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hwaddr rma_size;
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int vrma_adjust;
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ssize_t rtas_size;
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@ -656,6 +659,7 @@ void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConnectorType drc_type,
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void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type,
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uint32_t count, uint32_t index);
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void spapr_cpu_parse_features(sPAPRMachineState *spapr);
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int spapr_hpt_shift_for_ramsize(uint64_t ramsize);
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/* CPU and LMB DRC release callbacks. */
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void spapr_core_release(DeviceState *dev);
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@ -696,4 +700,6 @@ int spapr_rng_populate_dt(void *fdt);
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void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg);
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#define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
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#endif /* HW_SPAPR_H */
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@ -63,11 +63,15 @@ void ppc_hash64_update_rmls(CPUPPCState *env);
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#define HASH_PTE_SIZE_64 16
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#define HASH_PTEG_SIZE_64 (HASH_PTE_SIZE_64 * HPTES_PER_GROUP)
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#define HPTE64_V_SSIZE SLB_VSID_B
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#define HPTE64_V_SSIZE_256M SLB_VSID_B_256M
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#define HPTE64_V_SSIZE_1T SLB_VSID_B_1T
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#define HPTE64_V_SSIZE_SHIFT 62
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#define HPTE64_V_AVPN_SHIFT 7
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#define HPTE64_V_AVPN 0x3fffffffffffff80ULL
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#define HPTE64_V_AVPN_VAL(x) (((x) & HPTE64_V_AVPN) >> HPTE64_V_AVPN_SHIFT)
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#define HPTE64_V_COMPARE(x, y) (!(((x) ^ (y)) & 0xffffffffffffff83ULL))
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#define HPTE64_V_BOLTED 0x0000000000000010ULL
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#define HPTE64_V_LARGE 0x0000000000000004ULL
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#define HPTE64_V_SECONDARY 0x0000000000000002ULL
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#define HPTE64_V_VALID 0x0000000000000001ULL
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