openkylin
/
qemu
mirror of https://gitee.com/openkylin/qemu.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

target-arm: fix decoding of Neon 64 bit shifts. 

Fix decoding of 64 bits variants of VSHRN, VRSHRN, VQSHRN, VQSHRUN,
VQRSHRN, VQRSHRUN, taking into account whether inputs are unsigned
or not.

Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Christophe Lyon 2011-02-15 13:44:47 +00:00 committed by Aurelien Jarno
parent b408a9b072
commit 0b36f4cd47
1 changed files with 30 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
target-arm/translate.c
View File

@ -4783,6 +4783,8 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
} else if (op < 10) { } else if (op < 10) {
/* Shift by immediate and narrow: /* Shift by immediate and narrow:
VSHRN, VRSHRN, VQSHRN, VQRSHRN. */ VSHRN, VRSHRN, VQSHRN, VQRSHRN. */
int input_unsigned = (op == 8) ? !u : u;
shift = shift - (1 << (size + 3)); shift = shift - (1 << (size + 3));
size++; size++;
switch (size) { switch (size) {
@ -4809,33 +4811,46 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
if (size == 3) { if (size == 3) {
neon_load_reg64(cpu_V0, rm + pass); neon_load_reg64(cpu_V0, rm + pass);
if (q) { if (q) {
if (u) if (input_unsigned) {
gen_helper_neon_rshl_u64(cpu_V0, cpu_V0, tmp64); gen_helper_neon_rshl_u64(cpu_V0, cpu_V0,
else tmp64);
gen_helper_neon_rshl_s64(cpu_V0, cpu_V0, tmp64); } else {
gen_helper_neon_rshl_s64(cpu_V0, cpu_V0,
tmp64);
}
} else { } else {
if (u) if (input_unsigned) {
gen_helper_neon_shl_u64(cpu_V0, cpu_V0, tmp64); gen_helper_neon_shl_u64(cpu_V0, cpu_V0,
else tmp64);
gen_helper_neon_shl_s64(cpu_V0, cpu_V0, tmp64); } else {
gen_helper_neon_shl_s64(cpu_V0, cpu_V0,
tmp64);
}
} }
} else { } else {
tmp = neon_load_reg(rm + pass, 0); tmp = neon_load_reg(rm + pass, 0);
gen_neon_shift_narrow(size, tmp, tmp2, q, u); gen_neon_shift_narrow(size, tmp, tmp2, q,
input_unsigned);
tmp3 = neon_load_reg(rm + pass, 1); tmp3 = neon_load_reg(rm + pass, 1);
gen_neon_shift_narrow(size, tmp3, tmp2, q, u); gen_neon_shift_narrow(size, tmp3, tmp2, q,
input_unsigned);
tcg_gen_concat_i32_i64(cpu_V0, tmp, tmp3); tcg_gen_concat_i32_i64(cpu_V0, tmp, tmp3);
dead_tmp(tmp); dead_tmp(tmp);
dead_tmp(tmp3); dead_tmp(tmp3);
} }
tmp = new_tmp(); tmp = new_tmp();
if (op == 8 && !u) { if (op == 8) {
gen_neon_narrow(size - 1, tmp, cpu_V0); if (u) { /* VQSHRUN / VQRSHRUN */
gen_neon_unarrow_sats(size - 1, tmp, cpu_V0);
} else { /* VSHRN / VRSHRN */
gen_neon_narrow(size - 1, tmp, cpu_V0);
}
} else { } else {
if (op == 8) if (u) { /* VQSHRN / VQRSHRN */
gen_neon_narrow_sats(size - 1, tmp, cpu_V0);
else
gen_neon_narrow_satu(size - 1, tmp, cpu_V0); gen_neon_narrow_satu(size - 1, tmp, cpu_V0);
} else { /* VQSHRN / VQRSHRN */
gen_neon_narrow_sats(size - 1, tmp, cpu_V0);
}
} }
neon_store_reg(rd, pass, tmp); neon_store_reg(rd, pass, tmp);
} /* for pass */ } /* for pass */