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pxa2xx_gpio: switch to using qdev 

As noted by Markus Armbruster pxa2xx_gpio vmstate version bumped
because of a change in the or .ilevel / .olevel arrays are saved,
for convenience.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
This commit is contained in:
Dmitry Eremin-Solenikov 2011-01-21 19:57:50 +03:00 committed by Andrzej Zaborowski
parent 7ef4227baa
commit 0bb533374a
6 changed files with 108 additions and 116 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/gumstix.c
View File

@ -78,7 +78,7 @@ static void connex_init(ram_addr_t ram_size,
/* Interrupt line of NIC is connected to GPIO line 36 */ /* Interrupt line of NIC is connected to GPIO line 36 */
smc91c111_init(&nd_table[0], 0x04000300, smc91c111_init(&nd_table[0], 0x04000300,
pxa2xx_gpio_in_get(cpu->gpio)[36]); qdev_get_gpio_in(cpu->gpio, 36));
} }
static void verdex_init(ram_addr_t ram_size, static void verdex_init(ram_addr_t ram_size,
@ -117,7 +117,7 @@ static void verdex_init(ram_addr_t ram_size,
/* Interrupt line of NIC is connected to GPIO line 99 */ /* Interrupt line of NIC is connected to GPIO line 99 */
smc91c111_init(&nd_table[0], 0x04000300, smc91c111_init(&nd_table[0], 0x04000300,
pxa2xx_gpio_in_get(cpu->gpio)[99]); qdev_get_gpio_in(cpu->gpio, 99));
} }
static QEMUMachine connex_machine = { static QEMUMachine connex_machine = {

10
hw/pxa.h
View File

@ -70,13 +70,9 @@ void pxa25x_timer_init(target_phys_addr_t base, qemu_irq *irqs);
void pxa27x_timer_init(target_phys_addr_t base, qemu_irq *irqs, qemu_irq irq4); void pxa27x_timer_init(target_phys_addr_t base, qemu_irq *irqs, qemu_irq irq4);
/* pxa2xx_gpio.c */ /* pxa2xx_gpio.c */
typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo; DeviceState *pxa2xx_gpio_init(target_phys_addr_t base,
PXA2xxGPIOInfo *pxa2xx_gpio_init(target_phys_addr_t base,
CPUState *env, qemu_irq *pic, int lines); CPUState *env, qemu_irq *pic, int lines);
qemu_irq *pxa2xx_gpio_in_get(PXA2xxGPIOInfo *s); void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler);
void pxa2xx_gpio_out_set(PXA2xxGPIOInfo *s,
int line, qemu_irq handler);
void pxa2xx_gpio_read_notifier(PXA2xxGPIOInfo *s, qemu_irq handler);
/* pxa2xx_dma.c */ /* pxa2xx_dma.c */
typedef struct PXA2xxDMAState PXA2xxDMAState; typedef struct PXA2xxDMAState PXA2xxDMAState;
@ -132,7 +128,7 @@ typedef struct {
qemu_irq *pic; qemu_irq *pic;
qemu_irq reset; qemu_irq reset;
PXA2xxDMAState *dma; PXA2xxDMAState *dma;
PXA2xxGPIOInfo *gpio; DeviceState *gpio;
PXA2xxLCDState *lcd; PXA2xxLCDState *lcd;
SSIBus **ssp; SSIBus **ssp;
PXA2xxI2CState *i2c[2]; PXA2xxI2CState *i2c[2];

4
hw/pxa2xx.c
View File

@ -2158,7 +2158,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
/* GPIO1 resets the processor */ /* GPIO1 resets the processor */
/* The handler can be overridden by board-specific code */ /* The handler can be overridden by board-specific code */
pxa2xx_gpio_out_set(s->gpio, 1, s->reset); qdev_connect_gpio_out(s->gpio, 1, s->reset);
return s; return s;
} }
@ -2279,7 +2279,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
/* GPIO1 resets the processor */ /* GPIO1 resets the processor */
/* The handler can be overridden by board-specific code */ /* The handler can be overridden by board-specific code */
pxa2xx_gpio_out_set(s->gpio, 1, s->reset); qdev_connect_gpio_out(s->gpio, 1, s->reset);
return s; return s;
} }

160
hw/pxa2xx_gpio.c
View File

@ -8,15 +8,18 @@
*/ */
#include "hw.h" #include "hw.h"
#include "sysbus.h"
#include "pxa.h" #include "pxa.h"
#define PXA2XX_GPIO_BANKS 4 #define PXA2XX_GPIO_BANKS 4
typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo;
struct PXA2xxGPIOInfo { struct PXA2xxGPIOInfo {
qemu_irq *pic; SysBusDevice busdev;
qemu_irq irq0, irq1, irqX;
int lines; int lines;
int ncpu;
CPUState *cpu_env; CPUState *cpu_env;
qemu_irq *in;
/* XXX: GNU C vectors are more suitable */ /* XXX: GNU C vectors are more suitable */
uint32_t ilevel[PXA2XX_GPIO_BANKS]; uint32_t ilevel[PXA2XX_GPIO_BANKS];
@ -66,19 +69,19 @@ static struct {
static void pxa2xx_gpio_irq_update(PXA2xxGPIOInfo *s) static void pxa2xx_gpio_irq_update(PXA2xxGPIOInfo *s)
{ {
if (s->status[0] & (1 << 0)) if (s->status[0] & (1 << 0))
qemu_irq_raise(s->pic[PXA2XX_PIC_GPIO_0]); qemu_irq_raise(s->irq0);
else else
qemu_irq_lower(s->pic[PXA2XX_PIC_GPIO_0]); qemu_irq_lower(s->irq0);
if (s->status[0] & (1 << 1)) if (s->status[0] & (1 << 1))
qemu_irq_raise(s->pic[PXA2XX_PIC_GPIO_1]); qemu_irq_raise(s->irq1);
else else
qemu_irq_lower(s->pic[PXA2XX_PIC_GPIO_1]); qemu_irq_lower(s->irq1);
if ((s->status[0] & ~3) | s->status[1] | s->status[2] | s->status[3]) if ((s->status[0] & ~3) | s->status[1] | s->status[2] | s->status[3])
qemu_irq_raise(s->pic[PXA2XX_PIC_GPIO_X]); qemu_irq_raise(s->irqX);
else else
qemu_irq_lower(s->pic[PXA2XX_PIC_GPIO_X]); qemu_irq_lower(s->irqX);
} }
/* Bitmap of pins used as standby and sleep wake-up sources. */ /* Bitmap of pins used as standby and sleep wake-up sources. */
@ -249,96 +252,89 @@ static CPUWriteMemoryFunc * const pxa2xx_gpio_writefn[] = {
pxa2xx_gpio_write pxa2xx_gpio_write
}; };
static void pxa2xx_gpio_save(QEMUFile *f, void *opaque) DeviceState *pxa2xx_gpio_init(target_phys_addr_t base,
{
PXA2xxGPIOInfo *s = (PXA2xxGPIOInfo *) opaque;
int i;
qemu_put_be32(f, s->lines);
for (i = 0; i < PXA2XX_GPIO_BANKS; i ++) {
qemu_put_be32s(f, &s->ilevel[i]);
qemu_put_be32s(f, &s->olevel[i]);
qemu_put_be32s(f, &s->dir[i]);
qemu_put_be32s(f, &s->rising[i]);
qemu_put_be32s(f, &s->falling[i]);
qemu_put_be32s(f, &s->status[i]);
qemu_put_be32s(f, &s->gafr[i * 2 + 0]);
qemu_put_be32s(f, &s->gafr[i * 2 + 1]);
qemu_put_be32s(f, &s->prev_level[i]);
}
}
static int pxa2xx_gpio_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxGPIOInfo *s = (PXA2xxGPIOInfo *) opaque;
int i;
if (qemu_get_be32(f) != s->lines)
return -EINVAL;
for (i = 0; i < PXA2XX_GPIO_BANKS; i ++) {
qemu_get_be32s(f, &s->ilevel[i]);
qemu_get_be32s(f, &s->olevel[i]);
qemu_get_be32s(f, &s->dir[i]);
qemu_get_be32s(f, &s->rising[i]);
qemu_get_be32s(f, &s->falling[i]);
qemu_get_be32s(f, &s->status[i]);
qemu_get_be32s(f, &s->gafr[i * 2 + 0]);
qemu_get_be32s(f, &s->gafr[i * 2 + 1]);
qemu_get_be32s(f, &s->prev_level[i]);
}
return 0;
}
PXA2xxGPIOInfo *pxa2xx_gpio_init(target_phys_addr_t base,
CPUState *env, qemu_irq *pic, int lines) CPUState *env, qemu_irq *pic, int lines)
{
DeviceState *dev;
dev = qdev_create(NULL, "pxa2xx-gpio");
qdev_prop_set_int32(dev, "lines", lines);
qdev_prop_set_int32(dev, "ncpu", env->cpu_index);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[PXA2XX_PIC_GPIO_0]);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[PXA2XX_PIC_GPIO_1]);
sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[PXA2XX_PIC_GPIO_X]);
return dev;
}
static int pxa2xx_gpio_initfn(SysBusDevice *dev)
{ {
int iomemtype; int iomemtype;
PXA2xxGPIOInfo *s; PXA2xxGPIOInfo *s;
s = (PXA2xxGPIOInfo *) s = FROM_SYSBUS(PXA2xxGPIOInfo, dev);
qemu_mallocz(sizeof(PXA2xxGPIOInfo));
memset(s, 0, sizeof(PXA2xxGPIOInfo)); s->cpu_env = qemu_get_cpu(s->ncpu);
s->pic = pic;
s->lines = lines; qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
s->cpu_env = env; qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
s->in = qemu_allocate_irqs(pxa2xx_gpio_set, s, lines);
iomemtype = cpu_register_io_memory(pxa2xx_gpio_readfn, iomemtype = cpu_register_io_memory(pxa2xx_gpio_readfn,
pxa2xx_gpio_writefn, s, DEVICE_NATIVE_ENDIAN); pxa2xx_gpio_writefn, s, DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, 0x00001000, iomemtype);
register_savevm(NULL, "pxa2xx_gpio", 0, 0, sysbus_init_mmio(dev, 0x1000, iomemtype);
pxa2xx_gpio_save, pxa2xx_gpio_load, s); sysbus_init_irq(dev, &s->irq0);
sysbus_init_irq(dev, &s->irq1);
sysbus_init_irq(dev, &s->irqX);
return s; return 0;
}
qemu_irq *pxa2xx_gpio_in_get(PXA2xxGPIOInfo *s)
{
return s->in;
}
void pxa2xx_gpio_out_set(PXA2xxGPIOInfo *s,
int line, qemu_irq handler)
{
if (line >= s->lines) {
printf("%s: No GPIO pin %i\n", __FUNCTION__, line);
return;
}
s->handler[line] = handler;
} }
/* /*
* Registers a callback to notify on GPLR reads. This normally * Registers a callback to notify on GPLR reads. This normally
* shouldn't be needed but it is used for the hack on Spitz machines. * shouldn't be needed but it is used for the hack on Spitz machines.
*/ */
void pxa2xx_gpio_read_notifier(PXA2xxGPIOInfo *s, qemu_irq handler) void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler)
{ {
PXA2xxGPIOInfo *s = FROM_SYSBUS(PXA2xxGPIOInfo, sysbus_from_qdev(dev));
s->read_notify = handler; s->read_notify = handler;
} }
static const VMStateDescription vmstate_pxa2xx_gpio_regs = {
.name = "pxa2xx-gpio",
.version_id = 1,
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField []) {
VMSTATE_INT32(lines, PXA2xxGPIOInfo),
VMSTATE_UINT32_ARRAY(ilevel, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS),
VMSTATE_UINT32_ARRAY(olevel, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS),
VMSTATE_UINT32_ARRAY(dir, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS),
VMSTATE_UINT32_ARRAY(rising, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS),
VMSTATE_UINT32_ARRAY(falling, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS),
VMSTATE_UINT32_ARRAY(status, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS),
VMSTATE_UINT32_ARRAY(gafr, PXA2xxGPIOInfo, PXA2XX_GPIO_BANKS * 2),
VMSTATE_END_OF_LIST(),
},
};
static SysBusDeviceInfo pxa2xx_gpio_info = {
.init = pxa2xx_gpio_initfn,
.qdev.name = "pxa2xx-gpio",
.qdev.desc = "PXA2xx GPIO controller",
.qdev.size = sizeof(PXA2xxGPIOInfo),
.qdev.props = (Property []) {
DEFINE_PROP_INT32("lines", PXA2xxGPIOInfo, lines, 0),
DEFINE_PROP_INT32("ncpu", PXA2xxGPIOInfo, ncpu, 0),
DEFINE_PROP_END_OF_LIST(),
}
};
static void pxa2xx_gpio_register(void)
{
sysbus_register_withprop(&pxa2xx_gpio_info);
}
device_init(pxa2xx_gpio_register);

34
hw/spitz.c
View File

@ -470,10 +470,10 @@ static void spitz_keyboard_register(PXA2xxState *cpu)
s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev)); s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev));
for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
qdev_connect_gpio_out(dev, i, pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]]); qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
for (i = 0; i < 5; i ++) for (i = 0; i < 5; i ++)
s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]]; s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
if (!graphic_rotate) if (!graphic_rotate)
s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
@ -482,7 +482,7 @@ static void spitz_keyboard_register(PXA2xxState *cpu)
qemu_set_irq(s->gpiomap[i], 0); qemu_set_irq(s->gpiomap[i], 0);
for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
qdev_get_gpio_in(dev, i)); qdev_get_gpio_in(dev, i));
qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock)); qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock));
@ -685,7 +685,7 @@ static void spitz_ssp_attach(PXA2xxState *cpu)
bus = qdev_get_child_bus(mux, "ssi1"); bus = qdev_get_child_bus(mux, "ssi1");
dev = ssi_create_slave(bus, "ads7846"); dev = ssi_create_slave(bus, "ads7846");
qdev_connect_gpio_out(dev, 0, qdev_connect_gpio_out(dev, 0,
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]); qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
bus = qdev_get_child_bus(mux, "ssi2"); bus = qdev_get_child_bus(mux, "ssi2");
max1111 = ssi_create_slave(bus, "max1111"); max1111 = ssi_create_slave(bus, "max1111");
@ -693,11 +693,11 @@ static void spitz_ssp_attach(PXA2xxState *cpu)
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
qdev_get_gpio_in(mux, 0)); qdev_get_gpio_in(mux, 0));
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
qdev_get_gpio_in(mux, 1)); qdev_get_gpio_in(mux, 1));
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
qdev_get_gpio_in(mux, 2)); qdev_get_gpio_in(mux, 2));
} }
@ -747,7 +747,7 @@ static void spitz_i2c_setup(PXA2xxState *cpu)
wm = i2c_create_slave(bus, "wm8750", 0); wm = i2c_create_slave(bus, "wm8750", 0);
spitz_wm8750_addr(wm, 0, 0); spitz_wm8750_addr(wm, 0, 0);
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM, qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]); qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
/* .. and to the sound interface. */ /* .. and to the sound interface. */
cpu->i2s->opaque = wm; cpu->i2s->opaque = wm;
@ -840,7 +840,7 @@ static int spitz_hsync;
static void spitz_lcd_hsync_handler(void *opaque, int line, int level) static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
{ {
PXA2xxState *cpu = (PXA2xxState *) opaque; PXA2xxState *cpu = (PXA2xxState *) opaque;
qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync); qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
spitz_hsync ^= 1; spitz_hsync ^= 1;
} }
@ -860,24 +860,24 @@ static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
/* MMC/SD host */ /* MMC/SD host */
pxa2xx_mmci_handlers(cpu->mmc, pxa2xx_mmci_handlers(cpu->mmc,
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]); qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
/* Battery lock always closed */ /* Battery lock always closed */
qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]); qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
/* Handle reset */ /* Handle reset */
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
/* PCMCIA signals: card's IRQ and Card-Detect */ /* PCMCIA signals: card's IRQ and Card-Detect */
if (slots >= 1) if (slots >= 1)
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ], qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]); qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
if (slots >= 2) if (slots >= 2)
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ], qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]); qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
} }
/* Board init. */ /* Board init. */

12
hw/tosa.c
View File

@ -95,18 +95,18 @@ static void tosa_gpio_setup(PXA2xxState *cpu,
/* MMC/SD host */ /* MMC/SD host */
pxa2xx_mmci_handlers(cpu->mmc, pxa2xx_mmci_handlers(cpu->mmc,
qdev_get_gpio_in(scp0, TOSA_GPIO_SD_WP), qdev_get_gpio_in(scp0, TOSA_GPIO_SD_WP),
qemu_irq_invert(pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_nSD_DETECT])); qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT)));
/* Handle reset */ /* Handle reset */
pxa2xx_gpio_out_set(cpu->gpio, TOSA_GPIO_ON_RESET, cpu->reset); qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, cpu->reset);
/* PCMCIA signals: card's IRQ and Card-Detect */ /* PCMCIA signals: card's IRQ and Card-Detect */
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_CF_IRQ], qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_CF_IRQ),
pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_CF_CD]); qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_CF_CD));
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_JC_CF_IRQ], qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ),
NULL); NULL);
qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]); qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]);
@ -220,7 +220,7 @@ static void tosa_init(ram_addr_t ram_size,
qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM); qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
tmio = tc6393xb_init(0x10000000, tmio = tc6393xb_init(0x10000000,
pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]); qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_TC6393XB_INT));
scp0 = sysbus_create_simple("scoop", 0x08800000, NULL); scp0 = sysbus_create_simple("scoop", 0x08800000, NULL);
scp1 = sysbus_create_simple("scoop", 0x14800040, NULL); scp1 = sysbus_create_simple("scoop", 0x14800040, NULL);