mirror of https://gitee.com/openkylin/qemu.git
pc: Ensure non-zero CPU ref count after attaching to ICC bus
Setting the parent bus of a device increases its ref count, which we ultimately want to level out. However it is only safe to do so after the last reference to the device in local code, as qom-set or similar operations might decrease the ref count. Therefore move the object_unref() from pc_new_cpu() into its callers. The APIC operations on the last CPU in pc_cpus_init() are still potentially insecure, but that is beyond the scope of this code movement. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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parent
42d58e7c67
commit
0e3bd56294
11
hw/i386/pc.c
11
hw/i386/pc.c
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@ -1006,7 +1006,6 @@ static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
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}
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qdev_set_parent_bus(DEVICE(cpu), qdev_get_child_bus(icc_bridge, "icc"));
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object_unref(OBJECT(cpu));
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object_property_set_int(OBJECT(cpu), apic_id, "apic-id", &local_err);
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object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
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@ -1025,7 +1024,9 @@ static const char *current_cpu_model;
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void pc_hot_add_cpu(const int64_t id, Error **errp)
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{
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DeviceState *icc_bridge;
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X86CPU *cpu;
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int64_t apic_id = x86_cpu_apic_id_from_index(id);
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Error *local_err = NULL;
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if (id < 0) {
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error_setg(errp, "Invalid CPU id: %" PRIi64, id);
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@ -1053,7 +1054,12 @@ void pc_hot_add_cpu(const int64_t id, Error **errp)
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icc_bridge = DEVICE(object_resolve_path_type("icc-bridge",
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TYPE_ICC_BRIDGE, NULL));
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pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp);
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cpu = pc_new_cpu(current_cpu_model, apic_id, icc_bridge, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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object_unref(OBJECT(cpu));
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}
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void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
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@ -1087,6 +1093,7 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
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error_report_err(error);
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exit(1);
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}
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object_unref(OBJECT(cpu));
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}
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/* map APIC MMIO area if CPU has APIC */
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