mirror of https://gitee.com/openkylin/qemu.git
vga: port vga_common_save/load to vmstate
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
parent
2a3138ab15
commit
11b6b34508
135
hw/vga.c
135
hw/vga.c
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@ -2131,96 +2131,67 @@ CPUWriteMemoryFunc * const vga_mem_write[3] = {
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vga_mem_writel,
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};
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void vga_common_save(QEMUFile *f, void *opaque)
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static int vga_common_post_load(void *opaque, int version_id)
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{
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VGACommonState *s = opaque;
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int i;
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qemu_put_be32s(f, &s->latch);
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qemu_put_8s(f, &s->sr_index);
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qemu_put_buffer(f, s->sr, 8);
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qemu_put_8s(f, &s->gr_index);
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qemu_put_buffer(f, s->gr, 16);
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qemu_put_8s(f, &s->ar_index);
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qemu_put_buffer(f, s->ar, 21);
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qemu_put_be32(f, s->ar_flip_flop);
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qemu_put_8s(f, &s->cr_index);
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qemu_put_buffer(f, s->cr, 256);
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qemu_put_8s(f, &s->msr);
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qemu_put_8s(f, &s->fcr);
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qemu_put_byte(f, s->st00);
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qemu_put_8s(f, &s->st01);
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qemu_put_8s(f, &s->dac_state);
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qemu_put_8s(f, &s->dac_sub_index);
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qemu_put_8s(f, &s->dac_read_index);
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qemu_put_8s(f, &s->dac_write_index);
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qemu_put_buffer(f, s->dac_cache, 3);
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qemu_put_buffer(f, s->palette, 768);
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qemu_put_be32(f, s->bank_offset);
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qemu_put_byte(f, s->is_vbe_vmstate);
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#ifdef CONFIG_BOCHS_VBE
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qemu_put_be16s(f, &s->vbe_index);
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for(i = 0; i < VBE_DISPI_INDEX_NB; i++)
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qemu_put_be16s(f, &s->vbe_regs[i]);
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qemu_put_be32s(f, &s->vbe_start_addr);
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qemu_put_be32s(f, &s->vbe_line_offset);
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qemu_put_be32s(f, &s->vbe_bank_mask);
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#endif
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}
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int vga_common_load(QEMUFile *f, void *opaque, int version_id)
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{
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VGACommonState *s = opaque;
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int i;
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if (version_id > 2)
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return -EINVAL;
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qemu_get_be32s(f, &s->latch);
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qemu_get_8s(f, &s->sr_index);
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qemu_get_buffer(f, s->sr, 8);
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qemu_get_8s(f, &s->gr_index);
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qemu_get_buffer(f, s->gr, 16);
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qemu_get_8s(f, &s->ar_index);
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qemu_get_buffer(f, s->ar, 21);
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s->ar_flip_flop=qemu_get_be32(f);
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qemu_get_8s(f, &s->cr_index);
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qemu_get_buffer(f, s->cr, 256);
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qemu_get_8s(f, &s->msr);
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qemu_get_8s(f, &s->fcr);
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qemu_get_8s(f, &s->st00);
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qemu_get_8s(f, &s->st01);
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qemu_get_8s(f, &s->dac_state);
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qemu_get_8s(f, &s->dac_sub_index);
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qemu_get_8s(f, &s->dac_read_index);
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qemu_get_8s(f, &s->dac_write_index);
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qemu_get_buffer(f, s->dac_cache, 3);
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qemu_get_buffer(f, s->palette, 768);
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s->bank_offset=qemu_get_be32(f);
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s->is_vbe_vmstate = qemu_get_byte(f);
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#ifdef CONFIG_BOCHS_VBE
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if (!s->is_vbe_vmstate)
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return -EINVAL;
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qemu_get_be16s(f, &s->vbe_index);
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for(i = 0; i < VBE_DISPI_INDEX_NB; i++)
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qemu_get_be16s(f, &s->vbe_regs[i]);
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qemu_get_be32s(f, &s->vbe_start_addr);
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qemu_get_be32s(f, &s->vbe_line_offset);
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qemu_get_be32s(f, &s->vbe_bank_mask);
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#else
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if (s->is_vbe_vmstate)
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return -EINVAL;
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#endif
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/* force refresh */
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s->graphic_mode = -1;
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return 0;
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}
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const VMStateDescription vmstate_vga_common = {
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.name = "vga",
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.version_id = 2,
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.minimum_version_id = 2,
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.minimum_version_id_old = 2,
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.post_load = vga_common_post_load,
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.fields = (VMStateField []) {
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VMSTATE_UINT32(latch, VGACommonState),
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VMSTATE_UINT8(sr_index, VGACommonState),
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VMSTATE_PARTIAL_BUFFER(sr, VGACommonState, 8),
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VMSTATE_UINT8(gr_index, VGACommonState),
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VMSTATE_PARTIAL_BUFFER(gr, VGACommonState, 16),
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VMSTATE_UINT8(ar_index, VGACommonState),
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VMSTATE_BUFFER(ar, VGACommonState),
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VMSTATE_INT32(ar_flip_flop, VGACommonState),
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VMSTATE_UINT8(cr_index, VGACommonState),
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VMSTATE_BUFFER(cr, VGACommonState),
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VMSTATE_UINT8(msr, VGACommonState),
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VMSTATE_UINT8(fcr, VGACommonState),
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VMSTATE_UINT8(st00, VGACommonState),
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VMSTATE_UINT8(st01, VGACommonState),
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VMSTATE_UINT8(dac_state, VGACommonState),
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VMSTATE_UINT8(dac_sub_index, VGACommonState),
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VMSTATE_UINT8(dac_read_index, VGACommonState),
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VMSTATE_UINT8(dac_write_index, VGACommonState),
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VMSTATE_BUFFER(dac_cache, VGACommonState),
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VMSTATE_BUFFER(palette, VGACommonState),
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VMSTATE_INT32(bank_offset, VGACommonState),
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VMSTATE_UINT8_EQUAL(is_vbe_vmstate, VGACommonState),
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#ifdef CONFIG_BOCHS_VBE
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VMSTATE_UINT16(vbe_index, VGACommonState),
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VMSTATE_UINT16_ARRAY(vbe_regs, VGACommonState, VBE_DISPI_INDEX_NB),
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VMSTATE_UINT32(vbe_start_addr, VGACommonState),
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VMSTATE_UINT32(vbe_line_offset, VGACommonState),
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VMSTATE_UINT32(vbe_bank_mask, VGACommonState),
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#endif
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VMSTATE_END_OF_LIST()
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}
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};
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void vga_common_save(QEMUFile *f, void *opaque)
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{
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vmstate_save_state(f, &vmstate_vga_common, opaque);
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}
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int vga_common_load(QEMUFile *f, void *opaque, int version_id)
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{
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return vmstate_load_state(f, &vmstate_vga_common, opaque, vmstate_vga_common.version_id);
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}
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void vga_common_init(VGACommonState *s, int vga_ram_size)
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{
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int i, j, v, b;
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@ -21,6 +21,9 @@
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <hw/hw.h>
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#define MSR_COLOR_EMULATION 0x01
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#define MSR_PAGE_SELECT 0x20
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@ -193,6 +196,7 @@ void vga_common_reset(VGACommonState *s);
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void vga_dirty_log_start(VGACommonState *s);
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extern const VMStateDescription vmstate_vga_common;
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void vga_common_save(QEMUFile *f, void *opaque);
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int vga_common_load(QEMUFile *f, void *opaque, int version_id);
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uint32_t vga_ioport_read(void *opaque, uint32_t addr);
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