mirror of https://gitee.com/openkylin/qemu.git
x86 fixes for -rc1
Fixes for x86 that missed hard freeze: * Don't trigger warnings for features set by CPU model versions (Xiaoyao Li) * Missing features in Icelake-Server, Skylake-Server, Cascadelake-Server CPU models (Chenyi Qiang) * Fix hvf x86_64 guest boot crash (Roman Bolshakov) -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEEWjIv1avE09usz9GqKAeTb5hNxaYFAl8Qma4UHGVoYWJrb3N0 QHJlZGhhdC5jb20ACgkQKAeTb5hNxaZ1vA/5AdOkD/TbRJV43KSVWA2MQ+ztelzu v5MHztOEYr0LHWi8H00k7MNuPKRUc+aMqi9NjW5i1VRwXMK4RoSKp8q5GRiHrggr IdIZ/Zy2ld1VpCS5pZDZnCgeaMGxBvDMwGat+jORw/LWKjWts+I4KZpI3rpIxFFu tq9lnEj0l/ZJRihmvzvfgimr8XNO3sEal2cEFeZQkr+pnHtbgdE/TlImWmtWg9dK afVdAM9/xOrTVilHGTMfu3zWqvDiRSERcvUoEzthQiNP2TdfU3t2hPvlzOOZsVHI XFTMEyIXFD+FDT8ixSGN77c4r+HA4H2rKO4k7ytbRtlAoqYfzKJ1dADdHt5o48de qCfEgaBTk1TqFQ3wDS2B7h70tl2WYKacVEDlObs0+2yMazjkG/3Pbc5T9v3o6nEo 0hCBtNV5j9KpQDIr2rIXz6gJPXdPo5TRlg9uP85LScRChO2MAUmxMjwGVjEBVXlC oraxmu+TdxBNe8iHPCrK/2WfKdApg/EBinws8nEUzD2+7AmHAZYd4l+q61w89XtC 0XdScHcTt9aK3WW+v0WLe8wYHtCtzNF2XmtG/TT47QXYlvbRkpG/wrwqrPftQksH T3uXIfldPCnO/65PvguUO1bjqlnMid6LL3mmE5AcOR5rZSR8+KU7uhbhNL/TlLZa mQ0KmpxdRAmjOHg= =17fk -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging x86 fixes for -rc1 Fixes for x86 that missed hard freeze: * Don't trigger warnings for features set by CPU model versions (Xiaoyao Li) * Missing features in Icelake-Server, Skylake-Server, Cascadelake-Server CPU models (Chenyi Qiang) * Fix hvf x86_64 guest boot crash (Roman Bolshakov) # gpg: Signature made Thu 16 Jul 2020 19:17:18 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: hvf: Explicitly set CR4 guest/host mask target/i386: add the missing vmx features for Skylake-Server and Cascadelake-Server CPU models target/i386: fix model number and add missing features for Icelake-Server CPU model target/i386: add fast short REP MOV support i386/cpu: Don't add unavailable_features to env->user_features i368/cpu: Clear env->user_features after loading versioned CPU model Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
151f76c689
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@ -984,7 +984,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
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NULL, NULL, NULL, NULL,
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"fsrm", NULL, NULL, NULL,
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"avx512-vp2intersect", NULL, "md-clear", NULL,
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NULL, NULL, "serialize", NULL,
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"tsx-ldtrk", NULL, NULL /* pconfig */, NULL,
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@ -3034,6 +3034,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
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{ /* end of list */ }
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}
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},
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{
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.version = 4,
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.props = (PropValue[]) {
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{ "vmx-eptp-switching", "on" },
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{ /* end of list */ }
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}
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},
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{ /* end of list */ }
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}
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},
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@ -3158,6 +3165,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
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{ /* end of list */ }
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},
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},
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{ .version = 4,
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.note = "ARCH_CAPABILITIES, no TSX",
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.props = (PropValue[]) {
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{ "vmx-eptp-switching", "on" },
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{ /* end of list */ }
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},
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},
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{ /* end of list */ }
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}
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},
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@ -3512,6 +3526,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
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{ /* end of list */ }
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},
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},
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{
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.version = 4,
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.props = (PropValue[]) {
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{ "sha-ni", "on" },
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{ "avx512ifma", "on" },
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{ "rdpid", "on" },
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{ "fsrm", "on" },
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{ "vmx-rdseed-exit", "on" },
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{ "vmx-pml", "on" },
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{ "vmx-eptp-switching", "on" },
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{ "model", "106" },
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{ /* end of list */ }
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},
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},
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{ /* end of list */ }
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}
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},
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@ -5159,6 +5187,13 @@ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model)
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object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort);
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x86_cpu_apply_version_props(cpu, model);
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/*
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* Properties in versioned CPU model are not user specified features.
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* We can simply clear env->user_features here since it will be filled later
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* in x86_cpu_expand_features() based on plus_features and minus_features.
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*/
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memset(&env->user_features, 0, sizeof(env->user_features));
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}
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#ifndef CONFIG_USER_ONLY
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@ -6364,7 +6399,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
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unavailable_features & env->user_features[d->to.index],
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"This feature depends on other features that were not requested");
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env->user_features[d->to.index] |= unavailable_features;
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env->features[d->to.index] &= ~unavailable_features;
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}
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}
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@ -775,6 +775,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2)
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/* AVX512 Multiply Accumulation Single Precision */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3)
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/* Fast Short Rep Mov */
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#define CPUID_7_0_EDX_FSRM (1U << 4)
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/* AVX512 Vector Pair Intersection to a Pair of Mask Registers */
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#define CPUID_7_0_EDX_AVX512_VP2INTERSECT (1U << 8)
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/* SERIALIZE instruction */
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@ -166,6 +166,7 @@ static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t cr4)
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wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4);
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wvmcs(vcpu, VMCS_CR4_SHADOW, cr4);
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wvmcs(vcpu, VMCS_CR4_MASK, CR4_VMXE);
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hv_vcpu_invalidate_tlb(vcpu);
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hv_vcpu_flush(vcpu);
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