mirror of https://gitee.com/openkylin/qemu.git
target-i386: cleanup x86_cpu_get_phys_page_debug
Make the code a bit more similar to x86_cpu_handle_mmu_fault. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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b09481de91
commit
16b96f82cd
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@ -811,7 +811,6 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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CPUX86State *env = &cpu->env;
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target_ulong pde_addr, pte_addr;
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uint64_t pte;
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hwaddr paddr;
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uint32_t page_offset;
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int page_size;
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@ -829,25 +828,24 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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/* test virtual address sign extension */
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sext = (int64_t)addr >> 47;
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if (sext != 0 && sext != -1)
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if (sext != 0 && sext != -1) {
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return -1;
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}
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pml4e_addr = ((env->cr[3] & ~0xfff) + (((addr >> 39) & 0x1ff) << 3)) &
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env->a20_mask;
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pml4e = ldq_phys(cs->as, pml4e_addr);
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if (!(pml4e & PG_PRESENT_MASK))
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if (!(pml4e & PG_PRESENT_MASK)) {
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return -1;
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pdpe_addr = ((pml4e & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) +
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}
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pdpe_addr = ((pml4e & PG_ADDRESS_MASK) +
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(((addr >> 30) & 0x1ff) << 3)) & env->a20_mask;
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pdpe = ldq_phys(cs->as, pdpe_addr);
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if (!(pdpe & PG_PRESENT_MASK))
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if (!(pdpe & PG_PRESENT_MASK)) {
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return -1;
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}
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if (pdpe & PG_PSE_MASK) {
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page_size = 1024 * 1024 * 1024;
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pte = pdpe & ~( (page_size - 1) & ~0xfff);
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pte &= ~(PG_NX_MASK | PG_HI_USER_MASK);
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pte = pdpe;
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goto out;
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}
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@ -861,7 +859,7 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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return -1;
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}
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pde_addr = ((pdpe & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) +
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pde_addr = ((pdpe & PG_ADDRESS_MASK) +
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(((addr >> 21) & 0x1ff) << 3)) & env->a20_mask;
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pde = ldq_phys(cs->as, pde_addr);
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if (!(pde & PG_PRESENT_MASK)) {
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@ -870,17 +868,17 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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if (pde & PG_PSE_MASK) {
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/* 2 MB page */
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page_size = 2048 * 1024;
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pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */
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pte = pde;
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} else {
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/* 4 KB page */
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pte_addr = ((pde & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) +
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pte_addr = ((pde & PG_ADDRESS_MASK) +
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(((addr >> 12) & 0x1ff) << 3)) & env->a20_mask;
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page_size = 4096;
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pte = ldq_phys(cs->as, pte_addr);
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}
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pte &= ~(PG_NX_MASK | PG_HI_USER_MASK);
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if (!(pte & PG_PRESENT_MASK))
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if (!(pte & PG_PRESENT_MASK)) {
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return -1;
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}
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} else {
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uint32_t pde;
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@ -896,8 +894,9 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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/* page directory entry */
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pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask;
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pte = ldl_phys(cs->as, pte_addr);
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if (!(pte & PG_PRESENT_MASK))
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if (!(pte & PG_PRESENT_MASK)) {
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return -1;
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}
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page_size = 4096;
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}
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pte = pte & env->a20_mask;
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@ -906,9 +905,9 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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#ifdef TARGET_X86_64
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out:
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#endif
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pte &= PG_ADDRESS_MASK & ~(page_size - 1);
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page_offset = (addr & TARGET_PAGE_MASK) & (page_size - 1);
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paddr = (pte & TARGET_PAGE_MASK) + page_offset;
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return paddr;
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return pte | page_offset;
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}
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void hw_breakpoint_insert(CPUX86State *env, int index)
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