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hw/arm/fsl-imx6ul: Wire up USB controllers 

IMX6UL USB controllers are quite similar to IMX7 USB controllers.
Wire them up the same way.

The only real difference is that wiring up phy devices is necessary
to avoid phy reset timeouts in the Linux kernel.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 20200313014551.12554-5-linux@roeck-us.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Guenter Roeck 2020-03-12 18:45:50 -07:00 committed by Peter Maydell
parent 8e0c158524
commit 17372bd812
2 changed files with 45 additions and 0 deletions
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35
hw/arm/fsl-imx6ul.c
View File

@ -20,6 +20,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx6ul.h"
#include "hw/misc/unimp.h"
#include "hw/usb/imx-usb-phy.h"
#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
@ -133,6 +134,18 @@ static void fsl_imx6ul_init(Object *obj)
TYPE_IMX_ENET);
}
/* USB */
for (i = 0; i < FSL_IMX6UL_NUM_USB_PHYS; i++) {
snprintf(name, NAME_SIZE, "usbphy%d", i);
sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]),
TYPE_IMX_USBPHY);
}
for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) {
snprintf(name, NAME_SIZE, "usb%d", i);
sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]),
TYPE_CHIPIDEA);
}
/*
* SDHCI
*/
@ -456,6 +469,28 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
}
/* USB */
for (i = 0; i < FSL_IMX6UL_NUM_USB_PHYS; i++) {
object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized",
&error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0,
FSL_IMX6UL_USBPHY1_ADDR + i * 0x1000);
}
for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) {
static const int FSL_IMX6UL_USBn_IRQ[] = {
FSL_IMX6UL_USB1_IRQ,
FSL_IMX6UL_USB2_IRQ,
};
object_property_set_bool(OBJECT(&s->usb[i]), true, "realized",
&error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
FSL_IMX6UL_USBO2_USB_ADDR + i * 0x200);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_USBn_IRQ[i]));
}
/*
* USDHC
*/

10
include/hw/arm/fsl-imx6ul.h
View File

@ -34,6 +34,8 @@
#include "hw/sd/sdhci.h"
#include "hw/ssi/imx_spi.h"
#include "hw/net/imx_fec.h"
#include "hw/usb/chipidea.h"
#include "hw/usb/imx-usb-phy.h"
#include "exec/memory.h"
#include "cpu.h"
@ -54,6 +56,8 @@ enum FslIMX6ULConfiguration {
FSL_IMX6UL_NUM_I2CS = 4,
FSL_IMX6UL_NUM_ECSPIS = 4,
FSL_IMX6UL_NUM_ADCS = 2,
FSL_IMX6UL_NUM_USB_PHYS = 2,
FSL_IMX6UL_NUM_USBS = 2,
};
typedef struct FslIMX6ULState {
@ -77,6 +81,8 @@ typedef struct FslIMX6ULState {
IMXFECState eth[FSL_IMX6UL_NUM_ETHS];
SDHCIState usdhc[FSL_IMX6UL_NUM_USDHCS];
IMX2WdtState wdt[FSL_IMX6UL_NUM_WDTS];
IMXUSBPHYState usbphy[FSL_IMX6UL_NUM_USB_PHYS];
ChipideaState usb[FSL_IMX6UL_NUM_USBS];
MemoryRegion rom;
MemoryRegion caam;
MemoryRegion ocram;
@ -145,6 +151,10 @@ enum FslIMX6ULMemoryMap {
FSL_IMX6UL_EPIT2_ADDR = 0x020D4000,
FSL_IMX6UL_EPIT1_ADDR = 0x020D0000,
FSL_IMX6UL_SNVS_HP_ADDR = 0x020CC000,
FSL_IMX6UL_USBPHY2_ADDR = 0x020CA000,
FSL_IMX6UL_USBPHY2_SIZE = (4 * 1024),
FSL_IMX6UL_USBPHY1_ADDR = 0x020C9000,
FSL_IMX6UL_USBPHY1_SIZE = (4 * 1024),
FSL_IMX6UL_ANALOG_ADDR = 0x020C8000,
FSL_IMX6UL_CCM_ADDR = 0x020C4000,
FSL_IMX6UL_WDOG2_ADDR = 0x020C0000,