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target/s390x: Implement LOAD PROGRAM PARAMETER 

Linux arch/s390/kernel/head(64).S uses LPP instruction if it is
available in facilities list provided by stfl/stfle instruction.
This is the case of newer z/System generations and their qemu
definition.

The description of LPP is at
http://www-01.ibm.com/support/docview.wss?uid=isg26fcd1cc32246f4c8852574ce0044734a

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Miroslav Benes <mbenes@suse.cz>
Message-Id: <20170227085353.20787-1-mbenes@suse.cz>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Miroslav Benes 2017-02-27 09:53:53 +01:00 committed by Richard Henderson
parent 5bf83628dc
commit 190b2422e6
2 changed files with 11 additions and 0 deletions
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2
target/s390x/insn-data.def
View File

@ -845,6 +845,8 @@
/* LOAD CONTROL */ /* LOAD CONTROL */
C(0xb700, LCTL, RS_a, Z, 0, a2, 0, 0, lctl, 0) C(0xb700, LCTL, RS_a, Z, 0, a2, 0, 0, lctl, 0)
C(0xeb2f, LCTLG, RSY_a, Z, 0, a2, 0, 0, lctlg, 0) C(0xeb2f, LCTLG, RSY_a, Z, 0, a2, 0, 0, lctlg, 0)
/* LOAD PROGRAM PARAMETER */
C(0xb280, LPP, S, LPP, 0, m2_64, 0, 0, lpp, 0)
/* LOAD PSW */ /* LOAD PSW */
C(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0) C(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0)
/* LOAD PSW EXTENDED */ /* LOAD PSW EXTENDED */

9
target/s390x/translate.c
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@ -1194,6 +1194,7 @@ typedef enum DisasFacility {
FAC_SCF, /* store clock fast */ FAC_SCF, /* store clock fast */
FAC_SFLE, /* store facility list extended */ FAC_SFLE, /* store facility list extended */
FAC_ILA, /* interlocked access facility 1 */ FAC_ILA, /* interlocked access facility 1 */
FAC_LPP, /* load-program-parameter */
} DisasFacility; } DisasFacility;
struct DisasInsn { struct DisasInsn {
@ -2567,6 +2568,14 @@ static ExitStatus op_lra(DisasContext *s, DisasOps *o)
return NO_EXIT; return NO_EXIT;
} }
static ExitStatus op_lpp(DisasContext *s, DisasOps *o)
{
check_privileged(s);
tcg_gen_st_i64(o->in2, cpu_env, offsetof(CPUS390XState, pp));
return NO_EXIT;
}
static ExitStatus op_lpsw(DisasContext *s, DisasOps *o) static ExitStatus op_lpsw(DisasContext *s, DisasOps *o)
{ {
TCGv_i64 t1, t2; TCGv_i64 t1, t2;