mirror of https://gitee.com/openkylin/qemu.git
target-ppc: USE LPCR_ILE to control exception endian on POWER7
On POWER7, LPCR_ILE is used to control what endian guests take their exceptions in so use it instead of MSR_ILE. Signed-off-by: Anton Blanchard <anton@samba.org> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -453,6 +453,8 @@ struct ppc_slb_t {
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#define MSR_RI 1 /* Recoverable interrupt 1 */
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#define MSR_LE 0 /* Little-endian mode 1 hflags */
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#define LPCR_ILE (1 << (63-38))
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#define msr_sf ((env->msr >> MSR_SF) & 1)
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#define msr_isf ((env->msr >> MSR_ISF) & 1)
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#define msr_shv ((env->msr >> MSR_SHV) & 1)
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@ -611,9 +611,19 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
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tlb_flush(env, 1);
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}
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#ifdef TARGET_PPC64
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if (excp_model == POWERPC_EXCP_POWER7) {
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if (env->spr[SPR_LPCR] & LPCR_ILE) {
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new_msr |= (target_ulong)1 << MSR_LE;
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}
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} else if (msr_ile) {
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new_msr |= (target_ulong)1 << MSR_LE;
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}
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#else
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if (msr_ile) {
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new_msr |= (target_ulong)1 << MSR_LE;
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}
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#endif
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/* Jump to handler */
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vector = env->excp_vectors[excp];
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