mirror of https://gitee.com/openkylin/qemu.git
target-ppc: Use mul*2 in mulh* insns
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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bf45f97133
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@ -30,8 +30,6 @@ DEF_HELPER_2(icbi, void, env, tl)
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DEF_HELPER_5(lscbx, tl, env, tl, i32, i32, i32)
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#if defined(TARGET_PPC64)
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DEF_HELPER_FLAGS_2(mulhd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_FLAGS_2(mulhdu, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_3(mulldo, i64, env, i64, i64)
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#endif
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@ -25,24 +25,6 @@
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/* Fixed point operations helpers */
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#if defined(TARGET_PPC64)
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/* multiply high word */
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uint64_t helper_mulhd(uint64_t arg1, uint64_t arg2)
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{
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uint64_t tl, th;
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muls64(&tl, &th, arg1, arg2);
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return th;
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}
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/* multiply high word unsigned */
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uint64_t helper_mulhdu(uint64_t arg1, uint64_t arg2)
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{
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uint64_t tl, th;
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mulu64(&tl, &th, arg1, arg2);
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return th;
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}
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uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2)
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{
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int64_t th;
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@ -1061,24 +1061,15 @@ GEN_INT_ARITH_DIVD(divdo, 0x1F, 1, 1);
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/* mulhw mulhw. */
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static void gen_mulhw(DisasContext *ctx)
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{
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TCGv_i64 t0, t1;
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TCGv_i32 t0 = tcg_temp_new_i32();
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TCGv_i32 t1 = tcg_temp_new_i32();
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t0 = tcg_temp_new_i64();
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t1 = tcg_temp_new_i64();
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#if defined(TARGET_PPC64)
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tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_ext32s_tl(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_mul_i64(t0, t0, t1);
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tcg_gen_shri_i64(cpu_gpr[rD(ctx->opcode)], t0, 32);
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#else
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tcg_gen_ext_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_ext_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_mul_i64(t0, t0, t1);
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tcg_gen_shri_i64(t0, t0, 32);
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tcg_gen_trunc_i64_tl(cpu_gpr[rD(ctx->opcode)], t0);
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#endif
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tcg_temp_free_i64(t0);
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tcg_temp_free_i64(t1);
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tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_muls2_i32(t0, t1, t0, t1);
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tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1);
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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if (unlikely(Rc(ctx->opcode) != 0))
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gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
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}
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@ -1086,24 +1077,15 @@ static void gen_mulhw(DisasContext *ctx)
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/* mulhwu mulhwu. */
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static void gen_mulhwu(DisasContext *ctx)
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{
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TCGv_i64 t0, t1;
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TCGv_i32 t0 = tcg_temp_new_i32();
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TCGv_i32 t1 = tcg_temp_new_i32();
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t0 = tcg_temp_new_i64();
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t1 = tcg_temp_new_i64();
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#if defined(TARGET_PPC64)
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tcg_gen_ext32u_i64(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_ext32u_i64(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_mul_i64(t0, t0, t1);
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tcg_gen_shri_i64(cpu_gpr[rD(ctx->opcode)], t0, 32);
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#else
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tcg_gen_extu_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_extu_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_mul_i64(t0, t0, t1);
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tcg_gen_shri_i64(t0, t0, 32);
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tcg_gen_trunc_i64_tl(cpu_gpr[rD(ctx->opcode)], t0);
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#endif
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tcg_temp_free_i64(t0);
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tcg_temp_free_i64(t1);
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tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_mulu2_i32(t0, t1, t0, t1);
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tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1);
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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if (unlikely(Rc(ctx->opcode) != 0))
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gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
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}
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@ -1159,19 +1141,31 @@ static void gen_mulli(DisasContext *ctx)
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tcg_gen_muli_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
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SIMM(ctx->opcode));
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}
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#if defined(TARGET_PPC64)
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#define GEN_INT_ARITH_MUL_HELPER(name, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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gen_helper_##name (cpu_gpr[rD(ctx->opcode)], \
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cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); \
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if (unlikely(Rc(ctx->opcode) != 0)) \
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gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); \
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}
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/* mulhd mulhd. */
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GEN_INT_ARITH_MUL_HELPER(mulhdu, 0x00);
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static void gen_mulhd(DisasContext *ctx)
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{
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TCGv lo = tcg_temp_new();
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tcg_gen_muls2_tl(lo, cpu_gpr[rD(ctx->opcode)],
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cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
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tcg_temp_free(lo);
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if (unlikely(Rc(ctx->opcode) != 0)) {
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gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
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}
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}
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/* mulhdu mulhdu. */
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GEN_INT_ARITH_MUL_HELPER(mulhd, 0x02);
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static void gen_mulhdu(DisasContext *ctx)
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{
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TCGv lo = tcg_temp_new();
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tcg_gen_mulu2_tl(lo, cpu_gpr[rD(ctx->opcode)],
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cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
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tcg_temp_free(lo);
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if (unlikely(Rc(ctx->opcode) != 0)) {
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gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
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}
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}
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/* mulld mulld. */
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static void gen_mulld(DisasContext *ctx)
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