mirror of https://gitee.com/openkylin/qemu.git
apic: add send_msi() to APICCommonClass
The MMIO based interface to APIC doesn't work well with MSIs that have upper address bits set (remapped x2APIC MSIs). A specialized interface is a quick and dirty way to avoid the shortcoming. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -169,6 +169,17 @@ static void kvm_apic_external_nmi(APICCommonState *s)
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run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
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}
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static void kvm_send_msi(MSIMessage *msg)
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{
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int ret;
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ret = kvm_irqchip_send_msi(kvm_state, *msg);
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if (ret < 0) {
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fprintf(stderr, "KVM: injection failed, MSI lost (%s)\n",
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strerror(-ret));
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}
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}
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static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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@ -179,13 +190,8 @@ static void kvm_apic_mem_write(void *opaque, hwaddr addr,
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uint64_t data, unsigned size)
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{
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MSIMessage msg = { .address = addr, .data = data };
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int ret;
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ret = kvm_irqchip_send_msi(kvm_state, msg);
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if (ret < 0) {
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fprintf(stderr, "KVM: injection failed, MSI lost (%s)\n",
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strerror(-ret));
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}
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kvm_send_msi(&msg);
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}
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static const MemoryRegionOps kvm_apic_io_ops = {
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@ -232,6 +238,7 @@ static void kvm_apic_class_init(ObjectClass *klass, void *data)
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k->enable_tpr_reporting = kvm_apic_enable_tpr_reporting;
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k->vapic_base_update = kvm_apic_vapic_base_update;
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k->external_nmi = kvm_apic_external_nmi;
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k->send_msi = kvm_send_msi;
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}
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static const TypeInfo kvm_apic_info = {
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@ -68,6 +68,11 @@ static void xen_apic_external_nmi(APICCommonState *s)
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{
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}
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static void xen_send_msi(MSIMessage *msi)
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{
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xen_hvm_inject_msi(msi->address, msi->data);
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}
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static void xen_apic_class_init(ObjectClass *klass, void *data)
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{
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APICCommonClass *k = APIC_COMMON_CLASS(klass);
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@ -78,6 +83,7 @@ static void xen_apic_class_init(ObjectClass *klass, void *data)
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k->get_tpr = xen_apic_get_tpr;
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k->vapic_base_update = xen_apic_vapic_base_update;
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k->external_nmi = xen_apic_external_nmi;
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k->send_msi = xen_send_msi;
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}
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static const TypeInfo xen_apic_info = {
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@ -740,8 +740,10 @@ static uint32_t apic_mem_readl(void *opaque, hwaddr addr)
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return val;
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}
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static void apic_send_msi(hwaddr addr, uint32_t data)
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static void apic_send_msi(MSIMessage *msi)
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{
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uint64_t addr = msi->address;
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uint32_t data = msi->data;
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uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
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uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
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uint8_t dest_mode = (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1;
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@ -762,7 +764,8 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val)
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* APIC is connected directly to the CPU.
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* Mapping them on the global bus happens to work because
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* MSI registers are reserved in APIC MMIO and vice versa. */
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apic_send_msi(addr, val);
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MSIMessage msi = { .address = addr, .data = val };
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apic_send_msi(&msi);
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return;
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}
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@ -913,6 +916,7 @@ static void apic_class_init(ObjectClass *klass, void *data)
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k->external_nmi = apic_external_nmi;
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k->pre_save = apic_pre_save;
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k->post_load = apic_post_load;
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k->send_msi = apic_send_msi;
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}
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static const TypeInfo apic_info = {
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@ -146,6 +146,10 @@ typedef struct APICCommonClass
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void (*pre_save)(APICCommonState *s);
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void (*post_load)(APICCommonState *s);
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void (*reset)(APICCommonState *s);
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/* send_msi emulates an APIC bus and its proper place would be in a new
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* device, but it's convenient to have it here for now.
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*/
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void (*send_msi)(MSIMessage *msi);
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} APICCommonClass;
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struct APICCommonState {
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