mirror of https://gitee.com/openkylin/qemu.git
msix: macro rename for function mask support
rename ENABLE_OFFSET -> CONTROL_OFFSET, since same byte includes function mask. This is in preparation for function mask support. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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5d7ff5bbde
commit
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14
hw/msix.c
14
hw/msix.c
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@ -27,8 +27,8 @@
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#define MSIX_PBA_OFFSET 8
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#define MSIX_CAP_LENGTH 12
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/* MSI enable bit is in byte 1 in FLAGS register */
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#define MSIX_ENABLE_OFFSET (PCI_MSIX_FLAGS + 1)
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/* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
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#define MSIX_CONTROL_OFFSET (PCI_MSIX_FLAGS + 1)
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#define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
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/* MSI-X table format */
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@ -101,7 +101,7 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
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bar_nr);
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pdev->msix_cap = config_offset;
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/* Make flags bit writeable. */
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pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK;
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pdev->wmask[config_offset + MSIX_CONTROL_OFFSET] |= MSIX_ENABLE_MASK;
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return 0;
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}
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@ -109,7 +109,7 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
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void msix_write_config(PCIDevice *dev, uint32_t addr,
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uint32_t val, int len)
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{
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unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET;
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unsigned enable_pos = dev->msix_cap + MSIX_CONTROL_OFFSET;
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if (addr + len <= enable_pos || addr > enable_pos)
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return;
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@ -327,7 +327,7 @@ int msix_present(PCIDevice *dev)
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int msix_enabled(PCIDevice *dev)
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{
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return (dev->cap_present & QEMU_PCI_CAP_MSIX) &&
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(dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &
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(dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &
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MSIX_ENABLE_MASK);
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}
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@ -363,8 +363,8 @@ void msix_reset(PCIDevice *dev)
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if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
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return;
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msix_free_irq_entries(dev);
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dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &=
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~dev->wmask[dev->msix_cap + MSIX_ENABLE_OFFSET];
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dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &=
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~dev->wmask[dev->msix_cap + MSIX_CONTROL_OFFSET];
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memset(dev->msix_table_page, 0, MSIX_PAGE_SIZE);
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msix_mask_all(dev, dev->msix_entries_nr);
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}
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