mirror of https://gitee.com/openkylin/qemu.git
mac_via: add GPIO for A/UX mode
Add a new auxmode GPIO that is updated when port B bit 6 is changed indicating whether the hardware is configured for A/UX mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211020134131.4392-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@ -880,6 +880,21 @@ static void via1_adb_update(MOS6522Q800VIA1State *v1s)
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}
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}
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}
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}
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static void via1_auxmode_update(MOS6522Q800VIA1State *v1s)
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{
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MOS6522State *s = MOS6522(v1s);
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int oldirq, irq;
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oldirq = (v1s->last_b & VIA1B_vMystery) ? 1 : 0;
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irq = (s->b & VIA1B_vMystery) ? 1 : 0;
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/* Check to see if the A/UX mode bit has changed */
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if (irq != oldirq) {
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trace_via1_auxmode(irq);
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qemu_set_irq(v1s->auxmode_irq, irq);
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}
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}
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static uint64_t mos6522_q800_via1_read(void *opaque, hwaddr addr, unsigned size)
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static uint64_t mos6522_q800_via1_read(void *opaque, hwaddr addr, unsigned size)
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{
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{
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MOS6522Q800VIA1State *s = MOS6522_Q800_VIA1(opaque);
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MOS6522Q800VIA1State *s = MOS6522_Q800_VIA1(opaque);
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@ -902,6 +917,7 @@ static void mos6522_q800_via1_write(void *opaque, hwaddr addr, uint64_t val,
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case VIA_REG_B:
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case VIA_REG_B:
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via1_rtc_update(v1s);
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via1_rtc_update(v1s);
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via1_adb_update(v1s);
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via1_adb_update(v1s);
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via1_auxmode_update(v1s);
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v1s->last_b = ms->b;
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v1s->last_b = ms->b;
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break;
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break;
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@ -1046,6 +1062,9 @@ static void mos6522_q800_via1_init(Object *obj)
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TYPE_ADB_BUS, DEVICE(v1s), "adb.0");
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TYPE_ADB_BUS, DEVICE(v1s), "adb.0");
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qdev_init_gpio_in(DEVICE(obj), via1_irq_request, VIA1_IRQ_NB);
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qdev_init_gpio_in(DEVICE(obj), via1_irq_request, VIA1_IRQ_NB);
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/* A/UX mode */
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qdev_init_gpio_out(DEVICE(obj), &v1s->auxmode_irq, 1);
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}
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}
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static const VMStateDescription vmstate_q800_via1 = {
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static const VMStateDescription vmstate_q800_via1 = {
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@ -228,6 +228,7 @@ via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "secto
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via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
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via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
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via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
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via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
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via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
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via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
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via1_auxmode(int mode) "setting auxmode to %d"
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# grlib_ahb_apb_pnp.c
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# grlib_ahb_apb_pnp.c
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grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
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grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
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@ -43,6 +43,7 @@ struct MOS6522Q800VIA1State {
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MemoryRegion via_mem;
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MemoryRegion via_mem;
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qemu_irq irqs[VIA1_IRQ_NB];
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qemu_irq irqs[VIA1_IRQ_NB];
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qemu_irq auxmode_irq;
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uint8_t last_b;
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uint8_t last_b;
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/* RTC */
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/* RTC */
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