mirror of https://gitee.com/openkylin/qemu.git
MIPS patches queue
- Fix invalid Kconfig dependency - Fix missing migrated value - Fix TCG temporary leak -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmB1bgMACgkQ4+MsLN6t wN7wlQ/9FMNjEaYnVUCsyGrxG9r2xxa9Cy55WHJly0woYs0SoqnpybbCW8LiAy5H HEDUItr3a4omh1ixaeqYDANYSa/u7duyyk3gxNizFTj19TUalM0bd9edNgwvZTvU U8I4GsD87RSuvLBzP+eg46XoMBWwuS4RF35dMN/NoK/Wrl24wwrJXhsv2ALwhS/F L/4e9/GO6B5Cz0eNeZPWSVFCrGupZf7dw5g6+k39a2W74G+iW1EGe4/rAhGsG2Vb yJOvZjuI3RGlWpdebTGBxEv4GQgvuiG5lf9Gtz/WaJbpcyOXvGY75jiQScz4hsGM O+avkY8Fi7ERLxt/r/prxj1bgUOym6LDPSBkHqiz30+ehNbigNRYjQaHQFEQqnUs 37MN5XEd0j0NfBr0XVHy0oZmv/+Z9v/3BFifsKcj4fd+u6NhJIbMgIhUOgiu/xHm g4b4cZEGFeqAEcR6LEaOmYTGsluvf1tcqJTanvXkXRu/T5bJy+jQXlOHQnbfhvnl bHcZRDoDrCHbRrpPyBT3kDyoack5dH7PuV7EzSLqSANei1eHf9c2zcZDPMLVG5q5 /7kAWz91+o38TRk+UL70rluwttABCjv3jZ+YepuXsKZieAjyEdBlW6hyopasvHWc SR6YXUcArS965/74ff2LDCA/3xLMR9b16NI/JS0wfu191MCgHhU= =YFeO -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/philmd/tags/mips-20210413' into staging MIPS patches queue - Fix invalid Kconfig dependency - Fix missing migrated value - Fix TCG temporary leak # gpg: Signature made Tue 13 Apr 2021 11:10:11 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20210413: target/mips: Fix TCG temporary leak in gen_cache_operation() hw/isa/piix4: Migrate Reset Control Register hw/isa/Kconfig: Add missing dependency VIA VT82C686 -> APM Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
2935f6f2c1
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@ -48,6 +48,7 @@ config VT82C686
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select SERIAL_ISA
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select FDC
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select USB_UHCI
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select APM
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config SMC37C669
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bool
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@ -93,12 +93,25 @@ static void piix4_isa_reset(DeviceState *dev)
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pci_conf[0xae] = 0x00;
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}
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static int piix4_ide_post_load(void *opaque, int version_id)
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{
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PIIX4State *s = opaque;
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if (version_id == 2) {
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s->rcr = 0;
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}
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return 0;
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}
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static const VMStateDescription vmstate_piix4 = {
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.name = "PIIX4",
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.version_id = 2,
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.version_id = 3,
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.minimum_version_id = 2,
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.post_load = piix4_ide_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(dev, PIIX4State),
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VMSTATE_UINT8_V(rcr, PIIX4State, 3),
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VMSTATE_END_OF_LIST()
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}
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};
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@ -12804,6 +12804,8 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base,
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TCGv t1 = tcg_temp_new();
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gen_base_offset_addr(ctx, t1, base, offset);
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gen_helper_cache(cpu_env, t1, t0);
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tcg_temp_free(t1);
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tcg_temp_free_i32(t0);
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}
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#if defined(TARGET_MIPS64)
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