mirror of https://gitee.com/openkylin/qemu.git
arm/stm32f405: Fix realization of "stm32f2xx-adc" devices
stm32f405_soc_initfn() creates six such devices, but
stm32f405_soc_realize() realizes only one. Affects machine
netduinoplus2.
In theory, a device becomes real only on realize. In practice, the
transition from unreal to real is a fuzzy one. The work to make a
device real can be spread between realize methods (fine),
instance_init methods (wrong), and board code wiring up the device
(fine as long as it effectively happens on realize). Depending on
what exactly is done where, a device can work even when we neglect
to realize it.
The five unrealized devices appear to stay unreal: neither MMIO nor
IRQ get wired up.
Fix stm32f405_soc_realize() to realize and wire up all six. Visible
in "info qtree":
bus: main-system-bus
type System
dev: stm32f405-soc, id ""
cpu-type = "cortex-m4-arm-cpu"
dev: stm32f2xx-adc, id ""
gpio-out "sysbus-irq" 1
- mmio ffffffffffffffff/00000000000000ff
+ mmio 0000000040012000/00000000000000ff
dev: stm32f2xx-adc, id ""
gpio-out "sysbus-irq" 1
- mmio ffffffffffffffff/00000000000000ff
+ mmio 0000000040012100/00000000000000ff
dev: stm32f2xx-adc, id ""
gpio-out "sysbus-irq" 1
- mmio ffffffffffffffff/00000000000000ff
+ mmio 0000000040012200/00000000000000ff
dev: stm32f2xx-adc, id ""
gpio-out "sysbus-irq" 1
- mmio ffffffffffffffff/00000000000000ff
+ mmio 0000000040012300/00000000000000ff
dev: stm32f2xx-adc, id ""
gpio-out "sysbus-irq" 1
- mmio 0000000040012000/00000000000000ff
+ mmio 0000000040012400/00000000000000ff
dev: stm32f2xx-adc, id ""
gpio-out "sysbus-irq" 1
- mmio ffffffffffffffff/00000000000000ff
+ mmio 0000000040012500/00000000000000ff
dev: armv7m, id ""
Fixes: 529fc5fd3e
Cc: Alistair Francis <alistair@alistair23.me>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200609122339.937862-2-armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
e8c9e65816
commit
2fb1f7d299
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@ -37,7 +37,8 @@ static const uint32_t usart_addr[] = { 0x40011000, 0x40004400, 0x40004800,
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/* At the moment only Timer 2 to 5 are modelled */
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static const uint32_t timer_addr[] = { 0x40000000, 0x40000400,
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0x40000800, 0x40000C00 };
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#define ADC_ADDR 0x40012000
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static const uint32_t adc_addr[] = { 0x40012000, 0x40012100, 0x40012200,
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0x40012300, 0x40012400, 0x40012500 };
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static const uint32_t spi_addr[] = { 0x40013000, 0x40003800, 0x40003C00,
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0x40013400, 0x40015000, 0x40015400 };
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#define EXTI_ADDR 0x40013C00
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@ -185,16 +186,18 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp)
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qdev_connect_gpio_out(DEVICE(&s->adc_irqs), 0,
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qdev_get_gpio_in(armv7m, ADC_IRQ));
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dev = DEVICE(&(s->adc[i]));
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object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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for (i = 0; i < STM_NUM_ADCS; i++) {
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dev = DEVICE(&(s->adc[i]));
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object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, adc_addr[i]);
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sysbus_connect_irq(busdev, 0,
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qdev_get_gpio_in(DEVICE(&s->adc_irqs), i));
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}
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, ADC_ADDR);
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sysbus_connect_irq(busdev, 0,
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qdev_get_gpio_in(DEVICE(&s->adc_irqs), i));
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/* SPI devices */
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for (i = 0; i < STM_NUM_SPIS; i++) {
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