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target-m68k: manage pre-dec et post-inc in CAS 

In these cases we must update the address register after
the operation.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1484332593-16782-4-git-send-email-laurent@vivier.eu>
This commit is contained in:
Laurent Vivier 2017-01-13 19:36:31 +01:00
parent 695576db2d
commit 308feb9352
1 changed files with 9 additions and 0 deletions
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target/m68k/translate.c
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@ -1963,6 +1963,15 @@ DISAS_INSN(cas)
gen_partset_reg(opsize, DREG(ext, 0), load); gen_partset_reg(opsize, DREG(ext, 0), load);
tcg_temp_free(load); tcg_temp_free(load);
switch (extract32(insn, 3, 3)) {
case 3: /* Indirect postincrement. */
tcg_gen_addi_i32(AREG(insn, 0), addr, opsize_bytes(opsize));
break;
case 4: /* Indirect predecrememnt. */
tcg_gen_mov_i32(AREG(insn, 0), addr);
break;
}
} }
DISAS_INSN(cas2w) DISAS_INSN(cas2w)