From 30a8cac1399306963cb3dd65e0421f957d8b4da7 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Mon, 15 Feb 2010 00:02:36 +0530 Subject: [PATCH] target-arm: support thumb exception handlers When handling an exception, switch to the correct mode based on the Thumb Exception (TE) bit in the SCTLR. Signed-off-by: Rabin Vincent --- target-arm/helper.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 27001e86a6..6f40084b23 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -824,11 +824,10 @@ void do_interrupt(CPUARMState *env) env->spsr = cpsr_read(env); /* Clear IT bits. */ env->condexec_bits = 0; - /* Switch to the new mode, and switch to Arm mode. */ - /* ??? Thumb interrupt handlers not implemented. */ + /* Switch to the new mode, and to the correct instruction set. */ env->uncached_cpsr = (env->uncached_cpsr & ~CPSR_M) | new_mode; env->uncached_cpsr |= mask; - env->thumb = 0; + env->thumb = (env->cp15.c1_sys & (1 << 30)) != 0; env->regs[14] = env->regs[15] + offset; env->regs[15] = addr; env->interrupt_request |= CPU_INTERRUPT_EXITTB;