mirror of https://gitee.com/openkylin/qemu.git
allwinner-a10-pit: avoid generation of spurious interrupts
The model was generating interrupts for all enabled timers after the expiration of one of them. Avoid this by passing explicitly the timer index to the callback function. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Li Guang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1395771730-16882-4-git-send-email-b.galvani@gmail.com [PMM: avoid duplicate typedef of AwA10PITState] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -193,18 +193,17 @@ static void a10_pit_reset(DeviceState *dev)
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static void a10_pit_timer_cb(void *opaque)
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static void a10_pit_timer_cb(void *opaque)
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{
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{
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AwA10PITState *s = AW_A10_PIT(opaque);
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AwA10TimerContext *tc = opaque;
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uint8_t i;
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AwA10PITState *s = tc->container;
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uint8_t i = tc->index;
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for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) {
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if (s->control[i] & AW_A10_PIT_TIMER_EN) {
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if (s->control[i] & AW_A10_PIT_TIMER_EN) {
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s->irq_status |= 1 << i;
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s->irq_status |= 1 << i;
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if (s->control[i] & AW_A10_PIT_TIMER_MODE) {
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if (s->control[i] & AW_A10_PIT_TIMER_MODE) {
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ptimer_stop(s->timer[i]);
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ptimer_stop(s->timer[i]);
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s->control[i] &= ~AW_A10_PIT_TIMER_EN;
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s->control[i] &= ~AW_A10_PIT_TIMER_EN;
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}
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qemu_irq_pulse(s->irq[i]);
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}
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}
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qemu_irq_pulse(s->irq[i]);
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}
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}
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}
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}
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@ -223,7 +222,11 @@ static void a10_pit_init(Object *obj)
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sysbus_init_mmio(sbd, &s->iomem);
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sysbus_init_mmio(sbd, &s->iomem);
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for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) {
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for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) {
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bh[i] = qemu_bh_new(a10_pit_timer_cb, s);
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AwA10TimerContext *tc = &s->timer_context[i];
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tc->container = s;
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tc->index = i;
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bh[i] = qemu_bh_new(a10_pit_timer_cb, tc);
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s->timer[i] = ptimer_init(bh[i]);
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s->timer[i] = ptimer_init(bh[i]);
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ptimer_set_freq(s->timer[i], 240000);
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ptimer_set_freq(s->timer[i], 240000);
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}
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}
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@ -35,12 +35,20 @@
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#define AW_A10_PIT_DEFAULT_CLOCK 0x4
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#define AW_A10_PIT_DEFAULT_CLOCK 0x4
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typedef struct AwA10PITState {
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typedef struct AwA10PITState AwA10PITState;
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typedef struct AwA10TimerContext {
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AwA10PITState *container;
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int index;
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} AwA10TimerContext;
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struct AwA10PITState {
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/*< private >*/
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/*< private >*/
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SysBusDevice parent_obj;
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SysBusDevice parent_obj;
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/*< public >*/
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/*< public >*/
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qemu_irq irq[AW_A10_PIT_TIMER_NR];
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qemu_irq irq[AW_A10_PIT_TIMER_NR];
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ptimer_state * timer[AW_A10_PIT_TIMER_NR];
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ptimer_state * timer[AW_A10_PIT_TIMER_NR];
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AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR];
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MemoryRegion iomem;
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MemoryRegion iomem;
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uint32_t irq_enable;
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uint32_t irq_enable;
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@ -53,6 +61,6 @@ typedef struct AwA10PITState {
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uint32_t count_lo;
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uint32_t count_lo;
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uint32_t count_hi;
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uint32_t count_hi;
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uint32_t count_ctl;
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uint32_t count_ctl;
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} AwA10PITState;
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};
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#endif
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#endif
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