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MIPS Queue for June 7th, 2019 

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Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-7-2019' into staging

MIPS Queue for June 7th, 2019

# gpg: Signature made Fri 07 Jun 2019 10:59:15 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-7-2019:
  tests/tcg: target/mips: Add README for MSA tests
  tests/tcg: target/mips: Add tests for MSA FP max/min instructions
  tests/tcg: target/mips: Add utility function reset_msa_registers()
  tests/tcg: target/mips: Move four tests to a better location
  tests/tcg: target/mips: Add tests for MSA shift instructions
  tests/tcg: target/mips: Amend and rearrange MSA wrappers
  target/mips: Unroll loops in helpers for MSA logic instructions
  target/mips: Outline places for future MSA helpers
  target/mips: Fix block-comment-related issues in msa_helper.c
  target/mips: Fix space-related format issues in msa_helper.c

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2019-06-07 11:17:28 +01:00
parent 0d74f3b427 88e34ac062
commit 33556237f6
239 changed files with 6550 additions and 197 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

575
target/mips/msa_helper.c
View File

@ -42,6 +42,467 @@
/* Element-by-element access macros */
#define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
/*
* Bit Count
* ---------
*
* +---------------+----------------------------------------------------------+
* | NLOC.B | Vector Leading Ones Count (byte) |
* | NLOC.H | Vector Leading Ones Count (halfword) |
* | NLOC.W | Vector Leading Ones Count (word) |
* | NLOC.D | Vector Leading Ones Count (doubleword) |
* | NLZC.B | Vector Leading Zeros Count (byte) |
* | NLZC.H | Vector Leading Zeros Count (halfword) |
* | NLZC.W | Vector Leading Zeros Count (word) |
* | NLZC.D | Vector Leading Zeros Count (doubleword) |
* | PCNT.B | Vector Population Count (byte) |
* | PCNT.H | Vector Population Count (halfword) |
* | PCNT.W | Vector Population Count (word) |
* | PCNT.D | Vector Population Count (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Bit Count group helpers here */
/*
* Bit Move
* --------
*
* +---------------+----------------------------------------------------------+
* | BMNZ.V | Vector Bit Move If Not Zero |
* | BMZ.V | Vector Bit Move If Zero |
* | BSEL.V | Vector Bit Select |
* | BINSL.B | Vector Bit Insert Left (byte) |
* | BINSL.H | Vector Bit Insert Left (halfword) |
* | BINSL.W | Vector Bit Insert Left (word) |
* | BINSL.D | Vector Bit Insert Left (doubleword) |
* | BINSR.B | Vector Bit Insert Right (byte) |
* | BINSR.H | Vector Bit Insert Right (halfword) |
* | BINSR.W | Vector Bit Insert Right (word) |
* | BINSR.D | Vector Bit Insert Right (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Bit Move group helpers here */
/*
* Bit Set
* -------
*
* +---------------+----------------------------------------------------------+
* | BCLR.B | Vector Bit Clear (byte) |
* | BCLR.H | Vector Bit Clear (halfword) |
* | BCLR.W | Vector Bit Clear (word) |
* | BCLR.D | Vector Bit Clear (doubleword) |
* | BNEG.B | Vector Bit Negate (byte) |
* | BNEG.H | Vector Bit Negate (halfword) |
* | BNEG.W | Vector Bit Negate (word) |
* | BNEG.D | Vector Bit Negate (doubleword) |
* | BSET.B | Vector Bit Set (byte) |
* | BSET.H | Vector Bit Set (halfword) |
* | BSET.W | Vector Bit Set (word) |
* | BSET.D | Vector Bit Set (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Bit Set group helpers here */
/*
* Fixed Multiply
* --------------
*
* +---------------+----------------------------------------------------------+
* | MADD_Q.H | Vector Fixed-Point Multiply and Add (halfword) |
* | MADD_Q.W | Vector Fixed-Point Multiply and Add (word) |
* | MADDR_Q.H | Vector Fixed-Point Multiply and Add Rounded (halfword) |
* | MADDR_Q.W | Vector Fixed-Point Multiply and Add Rounded (word) |
* | MSUB_Q.H | Vector Fixed-Point Multiply and Subtr. (halfword) |
* | MSUB_Q.W | Vector Fixed-Point Multiply and Subtr. (word) |
* | MSUBR_Q.H | Vector Fixed-Point Multiply and Subtr. Rounded (halfword)|
* | MSUBR_Q.W | Vector Fixed-Point Multiply and Subtr. Rounded (word) |
* | MUL_Q.H | Vector Fixed-Point Multiply (halfword) |
* | MUL_Q.W | Vector Fixed-Point Multiply (word) |
* | MULR_Q.H | Vector Fixed-Point Multiply Rounded (halfword) |
* | MULR_Q.W | Vector Fixed-Point Multiply Rounded (word) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Fixed Multiply group helpers here */
/*
* Float Max Min
* -------------
*
* +---------------+----------------------------------------------------------+
* | FMAX_A.W | Vector Floating-Point Maximum (Absolute) (word) |
* | FMAX_A.D | Vector Floating-Point Maximum (Absolute) (doubleword) |
* | FMAX.W | Vector Floating-Point Maximum (word) |
* | FMAX.D | Vector Floating-Point Maximum (doubleword) |
* | FMIN_A.W | Vector Floating-Point Minimum (Absolute) (word) |
* | FMIN_A.D | Vector Floating-Point Minimum (Absolute) (doubleword) |
* | FMIN.W | Vector Floating-Point Minimum (word) |
* | FMIN.D | Vector Floating-Point Minimum (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Float Max Min group helpers here */
/*
* Int Add
* -------
*
* +---------------+----------------------------------------------------------+
* | ADD_A.B | Vector Add Absolute Values (byte) |
* | ADD_A.H | Vector Add Absolute Values (halfword) |
* | ADD_A.W | Vector Add Absolute Values (word) |
* | ADD_A.D | Vector Add Absolute Values (doubleword) |
* | ADDS_A.B | Vector Signed Saturated Add (of Absolute) (byte) |
* | ADDS_A.H | Vector Signed Saturated Add (of Absolute) (halfword) |
* | ADDS_A.W | Vector Signed Saturated Add (of Absolute) (word) |
* | ADDS_A.D | Vector Signed Saturated Add (of Absolute) (doubleword) |
* | ADDS_S.B | Vector Signed Saturated Add (of Signed) (byte) |
* | ADDS_S.H | Vector Signed Saturated Add (of Signed) (halfword) |
* | ADDS_S.W | Vector Signed Saturated Add (of Signed) (word) |
* | ADDS_S.D | Vector Signed Saturated Add (of Signed) (doubleword) |
* | ADDS_U.B | Vector Unsigned Saturated Add (of Unsigned) (byte) |
* | ADDS_U.H | Vector Unsigned Saturated Add (of Unsigned) (halfword) |
* | ADDS_U.W | Vector Unsigned Saturated Add (of Unsigned) (word) |
* | ADDS_U.D | Vector Unsigned Saturated Add (of Unsigned) (doubleword) |
* | ADDV.B | Vector Add (byte) |
* | ADDV.H | Vector Add (halfword) |
* | ADDV.W | Vector Add (word) |
* | ADDV.D | Vector Add (doubleword) |
* | HSUB_S.H | Vector Signed Horizontal Add (halfword) |
* | HSUB_S.W | Vector Signed Horizontal Add (word) |
* | HSUB_S.D | Vector Signed Horizontal Add (doubleword) |
* | HSUB_U.H | Vector Unigned Horizontal Add (halfword) |
* | HSUB_U.W | Vector Unigned Horizontal Add (word) |
* | HSUB_U.D | Vector Unigned Horizontal Add (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Add group helpers here */
/*
* Int Average
* -----------
*
* +---------------+----------------------------------------------------------+
* | AVE_S.B | Vector Signed Average (byte) |
* | AVE_S.H | Vector Signed Average (halfword) |
* | AVE_S.W | Vector Signed Average (word) |
* | AVE_S.D | Vector Signed Average (doubleword) |
* | AVE_U.B | Vector Unsigned Average (byte) |
* | AVE_U.H | Vector Unsigned Average (halfword) |
* | AVE_U.W | Vector Unsigned Average (word) |
* | AVE_U.D | Vector Unsigned Average (doubleword) |
* | AVER_S.B | Vector Signed Average Rounded (byte) |
* | AVER_S.H | Vector Signed Average Rounded (halfword) |
* | AVER_S.W | Vector Signed Average Rounded (word) |
* | AVER_S.D | Vector Signed Average Rounded (doubleword) |
* | AVER_U.B | Vector Unsigned Average Rounded (byte) |
* | AVER_U.H | Vector Unsigned Average Rounded (halfword) |
* | AVER_U.W | Vector Unsigned Average Rounded (word) |
* | AVER_U.D | Vector Unsigned Average Rounded (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Average group helpers here */
/*
* Int Compare
* -----------
*
* +---------------+----------------------------------------------------------+
* | CEQ.B | Vector Compare Equal (byte) |
* | CEQ.H | Vector Compare Equal (halfword) |
* | CEQ.W | Vector Compare Equal (word) |
* | CEQ.D | Vector Compare Equal (doubleword) |
* | CLE_S.B | Vector Compare Signed Less Than or Equal (byte) |
* | CLE_S.H | Vector Compare Signed Less Than or Equal (halfword) |
* | CLE_S.W | Vector Compare Signed Less Than or Equal (word) |
* | CLE_S.D | Vector Compare Signed Less Than or Equal (doubleword) |
* | CLE_U.B | Vector Compare Unsigned Less Than or Equal (byte) |
* | CLE_U.H | Vector Compare Unsigned Less Than or Equal (halfword) |
* | CLE_U.W | Vector Compare Unsigned Less Than or Equal (word) |
* | CLE_U.D | Vector Compare Unsigned Less Than or Equal (doubleword) |
* | CLT_S.B | Vector Compare Signed Less Than (byte) |
* | CLT_S.H | Vector Compare Signed Less Than (halfword) |
* | CLT_S.W | Vector Compare Signed Less Than (word) |
* | CLT_S.D | Vector Compare Signed Less Than (doubleword) |
* | CLT_U.B | Vector Compare Unsigned Less Than (byte) |
* | CLT_U.H | Vector Compare Unsigned Less Than (halfword) |
* | CLT_U.W | Vector Compare Unsigned Less Than (word) |
* | CLT_U.D | Vector Compare Unsigned Less Than (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Compare group helpers here */
/*
* Int Divide
* ----------
*
* +---------------+----------------------------------------------------------+
* | DIV_S.B | Vector Signed Divide (byte) |
* | DIV_S.H | Vector Signed Divide (halfword) |
* | DIV_S.W | Vector Signed Divide (word) |
* | DIV_S.D | Vector Signed Divide (doubleword) |
* | DIV_U.B | Vector Unsigned Divide (byte) |
* | DIV_U.H | Vector Unsigned Divide (halfword) |
* | DIV_U.W | Vector Unsigned Divide (word) |
* | DIV_U.D | Vector Unsigned Divide (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Divide group helpers here */
/*
* Int Dot Product
* ---------------
*
* +---------------+----------------------------------------------------------+
* | DOTP_S.H | Vector Signed Dot Product (halfword) |
* | DOTP_S.W | Vector Signed Dot Product (word) |
* | DOTP_S.D | Vector Signed Dot Product (doubleword) |
* | DOTP_U.H | Vector Unsigned Dot Product (halfword) |
* | DOTP_U.W | Vector Unsigned Dot Product (word) |
* | DOTP_U.D | Vector Unsigned Dot Product (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Dot Product group helpers here */
/*
* Int Max Min
* -----------
*
* +---------------+----------------------------------------------------------+
* | MAX_A.B | Vector Maximum Based on Absolute Value (byte) |
* | MAX_A.H | Vector Maximum Based on Absolute Value (halfword) |
* | MAX_A.W | Vector Maximum Based on Absolute Value (word) |
* | MAX_A.D | Vector Maximum Based on Absolute Value (doubleword) |
* | MAX_S.B | Vector Signed Maximum (byte) |
* | MAX_S.H | Vector Signed Maximum (halfword) |
* | MAX_S.W | Vector Signed Maximum (word) |
* | MAX_S.D | Vector Signed Maximum (doubleword) |
* | MAX_U.B | Vector Unsigned Maximum (byte) |
* | MAX_U.H | Vector Unsigned Maximum (halfword) |
* | MAX_U.W | Vector Unsigned Maximum (word) |
* | MAX_U.D | Vector Unsigned Maximum (doubleword) |
* | MIN_A.B | Vector Minimum Based on Absolute Value (byte) |
* | MIN_A.H | Vector Minimum Based on Absolute Value (halfword) |
* | MIN_A.W | Vector Minimum Based on Absolute Value (word) |
* | MIN_A.D | Vector Minimum Based on Absolute Value (doubleword) |
* | MIN_S.B | Vector Signed Minimum (byte) |
* | MIN_S.H | Vector Signed Minimum (halfword) |
* | MIN_S.W | Vector Signed Minimum (word) |
* | MIN_S.D | Vector Signed Minimum (doubleword) |
* | MIN_U.B | Vector Unsigned Minimum (byte) |
* | MIN_U.H | Vector Unsigned Minimum (halfword) |
* | MIN_U.W | Vector Unsigned Minimum (word) |
* | MIN_U.D | Vector Unsigned Minimum (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Max Min group helpers here */
/*
* Int Modulo
* ----------
*
* +---------------+----------------------------------------------------------+
* | MOD_S.B | Vector Signed Modulo (byte) |
* | MOD_S.H | Vector Signed Modulo (halfword) |
* | MOD_S.W | Vector Signed Modulo (word) |
* | MOD_S.D | Vector Signed Modulo (doubleword) |
* | MOD_U.B | Vector Unsigned Modulo (byte) |
* | MOD_U.H | Vector Unsigned Modulo (halfword) |
* | MOD_U.W | Vector Unsigned Modulo (word) |
* | MOD_U.D | Vector Unsigned Modulo (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Modulo group helpers here */
/*
* Int Multiply
* ------------
*
* +---------------+----------------------------------------------------------+
* | MADDV.B | Vector Multiply and Add (byte) |
* | MADDV.H | Vector Multiply and Add (halfword) |
* | MADDV.W | Vector Multiply and Add (word) |
* | MADDV.D | Vector Multiply and Add (doubleword) |
* | MSUBV.B | Vector Multiply and Subtract (byte) |
* | MSUBV.H | Vector Multiply and Subtract (halfword) |
* | MSUBV.W | Vector Multiply and Subtract (word) |
* | MSUBV.D | Vector Multiply and Subtract (doubleword) |
* | MULV.B | Vector Multiply (byte) |
* | MULV.H | Vector Multiply (halfword) |
* | MULV.W | Vector Multiply (word) |
* | MULV.D | Vector Multiply (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Multiply group helpers here */
/*
* Int Subtract
* ------------
*
* +---------------+----------------------------------------------------------+
* | ASUB_S.B | Vector Absolute Values of Signed Subtract (byte) |
* | ASUB_S.H | Vector Absolute Values of Signed Subtract (halfword) |
* | ASUB_S.W | Vector Absolute Values of Signed Subtract (word) |
* | ASUB_S.D | Vector Absolute Values of Signed Subtract (doubleword) |
* | ASUB_U.B | Vector Absolute Values of Unsigned Subtract (byte) |
* | ASUB_U.H | Vector Absolute Values of Unsigned Subtract (halfword) |
* | ASUB_U.W | Vector Absolute Values of Unsigned Subtract (word) |
* | ASUB_U.D | Vector Absolute Values of Unsigned Subtract (doubleword) |
* | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
* | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
* | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
* | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
* | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
* | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
* | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
* | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
* | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |
* | SUBS_S.D | Vector Signed Saturated Subtract (of Signed) (doubleword)|
* | SUBS_U.B | Vector Unsigned Saturated Subtract (of Uns.) (byte) |
* | SUBS_U.H | Vector Unsigned Saturated Subtract (of Uns.) (halfword) |
* | SUBS_U.W | Vector Unsigned Saturated Subtract (of Uns.) (word) |
* | SUBS_U.D | Vector Unsigned Saturated Subtract (of Uns.) (doubleword)|
* | SUBSUS_S.B | Vector Uns. Sat. Subtract (of S. from Uns.) (byte) |
* | SUBSUS_S.H | Vector Uns. Sat. Subtract (of S. from Uns.) (halfword) |
* | SUBSUS_S.W | Vector Uns. Sat. Subtract (of S. from Uns.) (word) |
* | SUBSUS_S.D | Vector Uns. Sat. Subtract (of S. from Uns.) (doubleword) |
* | SUBSUU_U.B | Vector Signed Saturated Subtract (of Uns.) (byte) |
* | SUBSUU_U.H | Vector Signed Saturated Subtract (of Uns.) (halfword) |
* | SUBSUU_U.W | Vector Signed Saturated Subtract (of Uns.) (word) |
* | SUBSUU_U.D | Vector Signed Saturated Subtract (of Uns.) (doubleword) |
* | SUBV.B | Vector Subtract (byte) |
* | SUBV.H | Vector Subtract (halfword) |
* | SUBV.W | Vector Subtract (word) |
* | SUBV.D | Vector Subtract (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Subtract group helpers here */
/*
* Interleave
* ----------
*
* +---------------+----------------------------------------------------------+
* | ILVEV.B | Vector Interleave Even (byte) |
* | ILVEV.H | Vector Interleave Even (halfword) |
* | ILVEV.W | Vector Interleave Even (word) |
* | ILVEV.D | Vector Interleave Even (doubleword) |
* | ILVOD.B | Vector Interleave Odd (byte) |
* | ILVOD.H | Vector Interleave Odd (halfword) |
* | ILVOD.W | Vector Interleave Odd (word) |
* | ILVOD.D | Vector Interleave Odd (doubleword) |
* | ILVL.B | Vector Interleave Left (byte) |
* | ILVL.H | Vector Interleave Left (halfword) |
* | ILVL.W | Vector Interleave Left (word) |
* | ILVL.D | Vector Interleave Left (doubleword) |
* | ILVR.B | Vector Interleave Right (byte) |
* | ILVR.H | Vector Interleave Right (halfword) |
* | ILVR.W | Vector Interleave Right (word) |
* | ILVR.D | Vector Interleave Right (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Interleave group helpers here */
/*
* Logic
* -----
*
* +---------------+----------------------------------------------------------+
* | AND.V | Vector Logical And |
* | NOR.V | Vector Logical Negated Or |
* | OR.V | Vector Logical Or |
* | XOR.V | Vector Logical Exclusive Or |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Logic group helpers here */
/*
* Pack
* ----
*
* +---------------+----------------------------------------------------------+
* | PCKEV.B | Vector Pack Even (byte) |
* | PCKEV.H | Vector Pack Even (halfword) |
* | PCKEV.W | Vector Pack Even (word) |
* | PCKEV.D | Vector Pack Even (doubleword) |
* | PCKOD.B | Vector Pack Odd (byte) |
* | PCKOD.H | Vector Pack Odd (halfword) |
* | PCKOD.W | Vector Pack Odd (word) |
* | PCKOD.D | Vector Pack Odd (doubleword) |
* | VSHF.B | Vector Data Preserving Shuffle (byte) |
* | VSHF.H | Vector Data Preserving Shuffle (halfword) |
* | VSHF.W | Vector Data Preserving Shuffle (word) |
* | VSHF.D | Vector Data Preserving Shuffle (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Pack group helpers here */
/*
* Shift
* -----
*
* +---------------+----------------------------------------------------------+
* | SLL.B | Vector Shift Left (byte) |
* | SLL.H | Vector Shift Left (halfword) |
* | SLL.W | Vector Shift Left (word) |
* | SLL.D | Vector Shift Left (doubleword) |
* | SRA.B | Vector Shift Right Arithmetic (byte) |
* | SRA.H | Vector Shift Right Arithmetic (halfword) |
* | SRA.W | Vector Shift Right Arithmetic (word) |
* | SRA.D | Vector Shift Right Arithmetic (doubleword) |
* | SRAR.B | Vector Shift Right Arithmetic Rounded (byte) |
* | SRAR.H | Vector Shift Right Arithmetic Rounded (halfword) |
* | SRAR.W | Vector Shift Right Arithmetic Rounded (word) |
* | SRAR.D | Vector Shift Right Arithmetic Rounded (doubleword) |
* | SRL.B | Vector Shift Right Logical (byte) |
* | SRL.H | Vector Shift Right Logical (halfword) |
* | SRL.W | Vector Shift Right Logical (word) |
* | SRL.D | Vector Shift Right Logical (doubleword) |
* | SRLR.B | Vector Shift Right Logical Rounded (byte) |
* | SRLR.H | Vector Shift Right Logical Rounded (halfword) |
* | SRLR.W | Vector Shift Right Logical Rounded (word) |
* | SRLR.D | Vector Shift Right Logical Rounded (doubleword) |
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Shift group helpers here */
static inline void msa_move_v(wr_t *pwd, wr_t *pws)
{
uint32_t i;
@ -130,10 +591,6 @@ void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
} \
}
MSA_FN_VECTOR(and_v, pwd->d[i], pws->d[i] & pwt->d[i])
MSA_FN_VECTOR(or_v, pwd->d[i], pws->d[i] | pwt->d[i])
MSA_FN_VECTOR(nor_v, pwd->d[i], ~(pws->d[i] | pwt->d[i]))
MSA_FN_VECTOR(xor_v, pwd->d[i], pws->d[i] ^ pwt->d[i])
MSA_FN_VECTOR(bmnz_v, pwd->d[i],
BIT_MOVE_IF_NOT_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
MSA_FN_VECTOR(bmz_v, pwd->d[i],
@ -145,6 +602,46 @@ MSA_FN_VECTOR(bsel_v, pwd->d[i],
#undef BIT_SELECT
#undef MSA_FN_VECTOR
void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = pws->d[0] & pwt->d[0];
pwd->d[1] = pws->d[1] & pwt->d[1];
}
void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = pws->d[0] | pwt->d[0];
pwd->d[1] = pws->d[1] | pwt->d[1];
}
void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = ~(pws->d[0] | pwt->d[0]);
pwd->d[1] = ~(pws->d[1] | pwt->d[1]);
}
void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = pws->d[0] ^ pwt->d[0];
pwd->d[1] = pws->d[1] ^ pwt->d[1];
}
static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return arg1 + arg2;
@ -360,16 +857,16 @@ static inline int64_t msa_binsr_df(uint32_t df, int64_t dest, int64_t arg1,
static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
{
return arg < M_MIN_INT(m+1) ? M_MIN_INT(m+1) :
arg > M_MAX_INT(m+1) ? M_MAX_INT(m+1) :
arg;
return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
arg > M_MAX_INT(m + 1) ? M_MAX_INT(m + 1) :
arg;
}
static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
{
uint64_t u_arg = UNSIGNED(arg, df);
return u_arg < M_MAX_UINT(m+1) ? u_arg :
M_MAX_UINT(m+1);
return u_arg < M_MAX_UINT(m + 1) ? u_arg :
M_MAX_UINT(m + 1);
}
static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
@ -668,16 +1165,16 @@ static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
}
#define SIGNED_EVEN(a, df) \
((((int64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2))
((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
#define UNSIGNED_EVEN(a, df) \
((((uint64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2))
((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
#define SIGNED_ODD(a, df) \
((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2))
((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
#define UNSIGNED_ODD(a, df) \
((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2))
((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
#define SIGNED_EXTRACT(e, o, a, df) \
do { \
@ -1205,13 +1702,13 @@ void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
(DF_ELEMENTS(DF) / 2)
#define Rb(pwr, i) (pwr->b[i])
#define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE)/2])
#define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE) / 2])
#define Rh(pwr, i) (pwr->h[i])
#define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF)/2])
#define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF) / 2])
#define Rw(pwr, i) (pwr->w[i])
#define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD)/2])
#define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD) / 2])
#define Rd(pwr, i) (pwr->d[i])
#define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE)/2])
#define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE) / 2])
#undef MSA_LOOP_COND
@ -1975,8 +2472,10 @@ static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
c &= ~FP_UNDERFLOW;
}
/* Reciprocal operations set only Inexact when valid and not
divide by zero */
/*
* Reciprocal operations set only Inexact when valid and not
* divide by zero
*/
if ((action & RECIPROCAL_INEXACT) &&
(c & (FP_INVALID | FP_DIV0)) == 0) {
c = FP_INEXACT;
@ -1985,15 +2484,19 @@ static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
cause = c & enable; /* all current enabled exceptions */
if (cause == 0) {
/* No enabled exception, update the MSACSR Cause
with all current exceptions */
/*
* No enabled exception, update the MSACSR Cause
* with all current exceptions
*/
SET_FP_CAUSE(env->active_tc.msacsr,
(GET_FP_CAUSE(env->active_tc.msacsr) | c));
} else {
/* Current exceptions are enabled */
if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
/* Exception(s) will trap, update MSACSR Cause
with all enabled exceptions */
/*
* Exception(s) will trap, update MSACSR Cause
* with all enabled exceptions
*/
SET_FP_CAUSE(env->active_tc.msacsr,
(GET_FP_CAUSE(env->active_tc.msacsr) | c));
}
@ -3059,9 +3562,11 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) {
case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
/* Half precision floats come in two formats: standard
IEEE and "ARM" format. The latter gains extra exponent
range by omitting the NaN/Inf encodings. */
/*
* Half precision floats come in two formats: standard
* IEEE and "ARM" format. The latter gains extra exponent
* range by omitting the NaN/Inf encodings.
*/
flag ieee = 1;
MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
@ -3320,7 +3825,7 @@ void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
uint32_t wd, uint32_t ws)
{
float_status* status = &env->active_tc.msa_fp_status;
float_status *status = &env->active_tc.msa_fp_status;
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
@ -3617,9 +4122,11 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) {
case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
/* Half precision floats come in two formats: standard
IEEE and "ARM" format. The latter gains extra exponent
range by omitting the NaN/Inf encodings. */
/*
* Half precision floats come in two formats: standard
* IEEE and "ARM" format. The latter gains extra exponent
* range by omitting the NaN/Inf encodings.
*/
flag ieee = 1;
MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
@ -3651,9 +4158,11 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) {
case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
/* Half precision floats come in two formats: standard
IEEE and "ARM" format. The latter gains extra exponent
range by omitting the NaN/Inf encodings. */
/*
* Half precision floats come in two formats: standard
* IEEE and "ARM" format. The latter gains extra exponent
* range by omitting the NaN/Inf encodings.
*/
flag ieee = 1;
MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);

508
tests/tcg/mips/include/wrappers_msa.h
View File

@ -23,6 +23,54 @@
#define WRAPPERS_MSA_H
#define RESET_MSA_REGISTER(wi) \
__asm__ volatile ( \
"xor.v $" #wi ", $" #wi ", $" #wi "\n\t" \
: \
: \
: \
)
static inline void reset_msa_registers()
{
RESET_MSA_REGISTER(w0);
RESET_MSA_REGISTER(w1);
RESET_MSA_REGISTER(w2);
RESET_MSA_REGISTER(w3);
RESET_MSA_REGISTER(w4);
RESET_MSA_REGISTER(w5);
RESET_MSA_REGISTER(w6);
RESET_MSA_REGISTER(w7);
RESET_MSA_REGISTER(w8);
RESET_MSA_REGISTER(w9);
RESET_MSA_REGISTER(w10);
RESET_MSA_REGISTER(w11);
RESET_MSA_REGISTER(w12);
RESET_MSA_REGISTER(w13);
RESET_MSA_REGISTER(w14);
RESET_MSA_REGISTER(w15);
RESET_MSA_REGISTER(w16);
RESET_MSA_REGISTER(w17);
RESET_MSA_REGISTER(w18);
RESET_MSA_REGISTER(w19);
RESET_MSA_REGISTER(w20);
RESET_MSA_REGISTER(w21);
RESET_MSA_REGISTER(w22);
RESET_MSA_REGISTER(w23);
RESET_MSA_REGISTER(w24);
RESET_MSA_REGISTER(w25);
RESET_MSA_REGISTER(w26);
RESET_MSA_REGISTER(w27);
RESET_MSA_REGISTER(w28);
RESET_MSA_REGISTER(w29);
RESET_MSA_REGISTER(w30);
RESET_MSA_REGISTER(w31);
}
#define DO_MSA__WD__WS(suffix, mnemonic) \
static inline void do_msa_##suffix(const void *input, \
const void *output) \
@ -55,21 +103,6 @@ static inline void do_msa_##suffix(const void *input, \
); \
}
DO_MSA__WD__WS(NLOC_B, nloc.b)
DO_MSA__WD__WS(NLOC_H, nloc.h)
DO_MSA__WD__WS(NLOC_W, nloc.w)
DO_MSA__WD__WS(NLOC_D, nloc.d)
DO_MSA__WD__WS(NLZC_B, nlzc.b)
DO_MSA__WD__WS(NLZC_H, nlzc.h)
DO_MSA__WD__WS(NLZC_W, nlzc.w)
DO_MSA__WD__WS(NLZC_D, nlzc.d)
DO_MSA__WD__WS(PCNT_B, pcnt.b)
DO_MSA__WD__WS(PCNT_H, pcnt.h)
DO_MSA__WD__WS(PCNT_W, pcnt.w)
DO_MSA__WD__WS(PCNT_D, pcnt.d)
#define DO_MSA__WD__WS_WT(suffix, mnemonic) \
static inline void do_msa_##suffix(const void *input1, \
@ -126,85 +159,52 @@ static inline void do_msa_##suffix(void *input1, void *input2, \
); \
}
DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b)
DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h)
DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w)
DO_MSA__WD__WS_WT(ILVEV_D, ilvev.d)
DO_MSA__WD__WS_WT(ILVOD_B, ilvod.b)
DO_MSA__WD__WS_WT(ILVOD_H, ilvod.h)
DO_MSA__WD__WS_WT(ILVOD_W, ilvod.w)
DO_MSA__WD__WS_WT(ILVOD_D, ilvod.d)
/*
* Bit Count
* ---------
*/
DO_MSA__WD__WS_WT(ILVL_B, ilvl.b)
DO_MSA__WD__WS_WT(ILVL_H, ilvl.h)
DO_MSA__WD__WS_WT(ILVL_W, ilvl.w)
DO_MSA__WD__WS_WT(ILVL_D, ilvl.d)
DO_MSA__WD__WS(NLOC_B, nloc.b)
DO_MSA__WD__WS(NLOC_H, nloc.h)
DO_MSA__WD__WS(NLOC_W, nloc.w)
DO_MSA__WD__WS(NLOC_D, nloc.d)
DO_MSA__WD__WS_WT(ILVR_B, ilvr.b)
DO_MSA__WD__WS_WT(ILVR_H, ilvr.h)
DO_MSA__WD__WS_WT(ILVR_W, ilvr.w)
DO_MSA__WD__WS_WT(ILVR_D, ilvr.d)
DO_MSA__WD__WS(NLZC_B, nlzc.b)
DO_MSA__WD__WS(NLZC_H, nlzc.h)
DO_MSA__WD__WS(NLZC_W, nlzc.w)
DO_MSA__WD__WS(NLZC_D, nlzc.d)
DO_MSA__WD__WS_WT(AND_V, and.v)
DO_MSA__WD__WS_WT(NOR_V, nor.v)
DO_MSA__WD__WS_WT(OR_V, or.v)
DO_MSA__WD__WS_WT(XOR_V, xor.v)
DO_MSA__WD__WS(PCNT_B, pcnt.b)
DO_MSA__WD__WS(PCNT_H, pcnt.h)
DO_MSA__WD__WS(PCNT_W, pcnt.w)
DO_MSA__WD__WS(PCNT_D, pcnt.d)
DO_MSA__WD__WS_WT(CEQ_B, ceq.b)
DO_MSA__WD__WS_WT(CEQ_H, ceq.h)
DO_MSA__WD__WS_WT(CEQ_W, ceq.w)
DO_MSA__WD__WS_WT(CEQ_D, ceq.d)
DO_MSA__WD__WS_WT(CLE_S_B, cle_s.b)
DO_MSA__WD__WS_WT(CLE_S_H, cle_s.h)
DO_MSA__WD__WS_WT(CLE_S_W, cle_s.w)
DO_MSA__WD__WS_WT(CLE_S_D, cle_s.d)
/*
* Bit move
* --------
*/
DO_MSA__WD__WS_WT(CLE_U_B, cle_u.b)
DO_MSA__WD__WS_WT(CLE_U_H, cle_u.h)
DO_MSA__WD__WS_WT(CLE_U_W, cle_u.w)
DO_MSA__WD__WS_WT(CLE_U_D, cle_u.d)
DO_MSA__WD__WS_WT(BINSL_B, binsl.b)
DO_MSA__WD__WS_WT(BINSL_H, binsl.h)
DO_MSA__WD__WS_WT(BINSL_W, binsl.w)
DO_MSA__WD__WS_WT(BINSL_D, binsl.d)
DO_MSA__WD__WS_WT(CLT_S_B, clt_s.b)
DO_MSA__WD__WS_WT(CLT_S_H, clt_s.h)
DO_MSA__WD__WS_WT(CLT_S_W, clt_s.w)
DO_MSA__WD__WS_WT(CLT_S_D, clt_s.d)
DO_MSA__WD__WS_WT(BINSR_B, binsr.b)
DO_MSA__WD__WS_WT(BINSR_H, binsr.h)
DO_MSA__WD__WS_WT(BINSR_W, binsr.w)
DO_MSA__WD__WS_WT(BINSR_D, binsr.d)
DO_MSA__WD__WS_WT(CLT_U_B, clt_u.b)
DO_MSA__WD__WS_WT(CLT_U_H, clt_u.h)
DO_MSA__WD__WS_WT(CLT_U_W, clt_u.w)
DO_MSA__WD__WS_WT(CLT_U_D, clt_u.d)
DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v)
DO_MSA__WD__WS_WT(BMZ_V, bmz.v)
DO_MSA__WD__WS_WT(BSEL_V, bsel.v)
DO_MSA__WD__WS_WT(MAX_A_B, max_a.b)
DO_MSA__WD__WS_WT(MAX_A_H, max_a.h)
DO_MSA__WD__WS_WT(MAX_A_W, max_a.w)
DO_MSA__WD__WS_WT(MAX_A_D, max_a.d)
DO_MSA__WD__WS_WT(MIN_A_B, min_a.b)
DO_MSA__WD__WS_WT(MIN_A_H, min_a.h)
DO_MSA__WD__WS_WT(MIN_A_W, min_a.w)
DO_MSA__WD__WS_WT(MIN_A_D, min_a.d)
DO_MSA__WD__WS_WT(MAX_S_B, max_s.b)
DO_MSA__WD__WS_WT(MAX_S_H, max_s.h)
DO_MSA__WD__WS_WT(MAX_S_W, max_s.w)
DO_MSA__WD__WS_WT(MAX_S_D, max_s.d)
DO_MSA__WD__WS_WT(MIN_S_B, min_s.b)
DO_MSA__WD__WS_WT(MIN_S_H, min_s.h)
DO_MSA__WD__WS_WT(MIN_S_W, min_s.w)
DO_MSA__WD__WS_WT(MIN_S_D, min_s.d)
DO_MSA__WD__WS_WT(MAX_U_B, max_u.b)
DO_MSA__WD__WS_WT(MAX_U_H, max_u.h)
DO_MSA__WD__WS_WT(MAX_U_W, max_u.w)
DO_MSA__WD__WS_WT(MAX_U_D, max_u.d)
DO_MSA__WD__WS_WT(MIN_U_B, min_u.b)
DO_MSA__WD__WS_WT(MIN_U_H, min_u.h)
DO_MSA__WD__WS_WT(MIN_U_W, min_u.w)
DO_MSA__WD__WS_WT(MIN_U_D, min_u.d)
/*
* Bit Set
* -------
*/
DO_MSA__WD__WS_WT(BCLR_B, bclr.b)
DO_MSA__WD__WS_WT(BCLR_H, bclr.h)
@ -221,45 +221,53 @@ DO_MSA__WD__WS_WT(BNEG_H, bneg.h)
DO_MSA__WD__WS_WT(BNEG_W, bneg.w)
DO_MSA__WD__WS_WT(BNEG_D, bneg.d)
DO_MSA__WD__WS_WT(PCKEV_B, pckev.b)
DO_MSA__WD__WS_WT(PCKEV_H, pckev.h)
DO_MSA__WD__WS_WT(PCKEV_W, pckev.w)
DO_MSA__WD__WS_WT(PCKEV_D, pckev.d)
DO_MSA__WD__WS_WT(PCKOD_B, pckod.b)
DO_MSA__WD__WS_WT(PCKOD_H, pckod.h)
DO_MSA__WD__WS_WT(PCKOD_W, pckod.w)
DO_MSA__WD__WS_WT(PCKOD_D, pckod.d)
/*
* Fixed Multiply
* --------------
*/
DO_MSA__WD__WS_WT(VSHF_B, vshf.b)
DO_MSA__WD__WS_WT(VSHF_H, vshf.h)
DO_MSA__WD__WS_WT(VSHF_W, vshf.w)
DO_MSA__WD__WS_WT(VSHF_D, vshf.d)
DO_MSA__WD__WS_WT(MADD_Q_H, madd_q.h)
DO_MSA__WD__WS_WT(MADD_Q_W, madd_q.w)
DO_MSA__WD__WS_WT(SLL_B, sll.b)
DO_MSA__WD__WS_WT(SLL_H, sll.h)
DO_MSA__WD__WS_WT(SLL_W, sll.w)
DO_MSA__WD__WS_WT(SLL_D, sll.d)
DO_MSA__WD__WS_WT(MADDR_Q_H, maddr_q.h)
DO_MSA__WD__WS_WT(MADDR_Q_W, maddr_q.w)
DO_MSA__WD__WS_WT(SRA_B, sra.b)
DO_MSA__WD__WS_WT(SRA_H, sra.h)
DO_MSA__WD__WS_WT(SRA_W, sra.w)
DO_MSA__WD__WS_WT(SRA_D, sra.d)
DO_MSA__WD__WS_WT(MSUB_Q_H, msub_q.h)
DO_MSA__WD__WS_WT(MSUB_Q_W, msub_q.w)
DO_MSA__WD__WS_WT(SRAR_B, srar.b)
DO_MSA__WD__WS_WT(SRAR_H, srar.h)
DO_MSA__WD__WS_WT(SRAR_W, srar.w)
DO_MSA__WD__WS_WT(SRAR_D, srar.d)
DO_MSA__WD__WS_WT(MSUBR_Q_H, msubr_q.h)
DO_MSA__WD__WS_WT(MSUBR_Q_W, msubr_q.w)
DO_MSA__WD__WS_WT(SRL_B, srl.b)
DO_MSA__WD__WS_WT(SRL_H, srl.h)
DO_MSA__WD__WS_WT(SRL_W, srl.w)
DO_MSA__WD__WS_WT(SRL_D, srl.d)
DO_MSA__WD__WS_WT(MUL_Q_H, mul_q.h)
DO_MSA__WD__WS_WT(MUL_Q_W, mul_q.w)
DO_MSA__WD__WS_WT(SRLR_B, srlr.b)
DO_MSA__WD__WS_WT(SRLR_H, srlr.h)
DO_MSA__WD__WS_WT(SRLR_W, srlr.w)
DO_MSA__WD__WS_WT(SRLR_D, srlr.d)
DO_MSA__WD__WS_WT(MULR_Q_H, mulr_q.h)
DO_MSA__WD__WS_WT(MULR_Q_W, mulr_q.w)
/*
* Float Max Min
* -------------
*/
DO_MSA__WD__WS_WT(FMAX_W, fmax.w)
DO_MSA__WD__WS_WT(FMAX_D, fmax.d)
DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w)
DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d)
DO_MSA__WD__WS_WT(FMIN_W, fmin.w)
DO_MSA__WD__WS_WT(FMIN_D, fmin.d)
DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w)
DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d)
/*
* Int Add
* -------
*/
DO_MSA__WD__WS_WT(ADD_A_B, add_a.b)
DO_MSA__WD__WS_WT(ADD_A_H, add_a.h)
@ -294,15 +302,11 @@ DO_MSA__WD__WS_WT(HADD_U_H, hadd_u.h)
DO_MSA__WD__WS_WT(HADD_U_W, hadd_u.w)
DO_MSA__WD__WS_WT(HADD_U_D, hadd_u.d)
DO_MSA__WD__WS_WT(AVER_S_B, aver_s.b)
DO_MSA__WD__WS_WT(AVER_S_H, aver_s.h)
DO_MSA__WD__WS_WT(AVER_S_W, aver_s.w)
DO_MSA__WD__WS_WT(AVER_S_D, aver_s.d)
DO_MSA__WD__WS_WT(AVER_U_B, aver_u.b)
DO_MSA__WD__WS_WT(AVER_U_H, aver_u.h)
DO_MSA__WD__WS_WT(AVER_U_W, aver_u.w)
DO_MSA__WD__WS_WT(AVER_U_D, aver_u.d)
/*
* Int Average
* -----------
*/
DO_MSA__WD__WS_WT(AVE_S_B, ave_s.b)
DO_MSA__WD__WS_WT(AVE_S_H, ave_s.h)
@ -314,6 +318,53 @@ DO_MSA__WD__WS_WT(AVE_U_H, ave_u.h)
DO_MSA__WD__WS_WT(AVE_U_W, ave_u.w)
DO_MSA__WD__WS_WT(AVE_U_D, ave_u.d)
DO_MSA__WD__WS_WT(AVER_S_B, aver_s.b)
DO_MSA__WD__WS_WT(AVER_S_H, aver_s.h)
DO_MSA__WD__WS_WT(AVER_S_W, aver_s.w)
DO_MSA__WD__WS_WT(AVER_S_D, aver_s.d)
DO_MSA__WD__WS_WT(AVER_U_B, aver_u.b)
DO_MSA__WD__WS_WT(AVER_U_H, aver_u.h)
DO_MSA__WD__WS_WT(AVER_U_W, aver_u.w)
DO_MSA__WD__WS_WT(AVER_U_D, aver_u.d)
/*
* Int Compare
* -----------
*/
DO_MSA__WD__WS_WT(CEQ_B, ceq.b)
DO_MSA__WD__WS_WT(CEQ_H, ceq.h)
DO_MSA__WD__WS_WT(CEQ_W, ceq.w)
DO_MSA__WD__WS_WT(CEQ_D, ceq.d)
DO_MSA__WD__WS_WT(CLE_S_B, cle_s.b)
DO_MSA__WD__WS_WT(CLE_S_H, cle_s.h)
DO_MSA__WD__WS_WT(CLE_S_W, cle_s.w)
DO_MSA__WD__WS_WT(CLE_S_D, cle_s.d)
DO_MSA__WD__WS_WT(CLE_U_B, cle_u.b)
DO_MSA__WD__WS_WT(CLE_U_H, cle_u.h)
DO_MSA__WD__WS_WT(CLE_U_W, cle_u.w)
DO_MSA__WD__WS_WT(CLE_U_D, cle_u.d)
DO_MSA__WD__WS_WT(CLT_S_B, clt_s.b)
DO_MSA__WD__WS_WT(CLT_S_H, clt_s.h)
DO_MSA__WD__WS_WT(CLT_S_W, clt_s.w)
DO_MSA__WD__WS_WT(CLT_S_D, clt_s.d)
DO_MSA__WD__WS_WT(CLT_U_B, clt_u.b)
DO_MSA__WD__WS_WT(CLT_U_H, clt_u.h)
DO_MSA__WD__WS_WT(CLT_U_W, clt_u.w)
DO_MSA__WD__WS_WT(CLT_U_D, clt_u.d)
/*
* Int Divide
* ----------
*/
DO_MSA__WD__WS_WT(DIV_S_B, div_s.b)
DO_MSA__WD__WS_WT(DIV_S_H, div_s.h)
DO_MSA__WD__WS_WT(DIV_S_W, div_s.w)
@ -324,6 +375,12 @@ DO_MSA__WD__WS_WT(DIV_U_H, div_u.h)
DO_MSA__WD__WS_WT(DIV_U_W, div_u.w)
DO_MSA__WD__WS_WT(DIV_U_D, div_u.d)
/*
* Int Dot Product
* ---------------
*/
DO_MSA__WD__WS_WT(DOTP_S_H, dotp_s.h)
DO_MSA__WD__WS_WT(DOTP_S_W, dotp_s.w)
DO_MSA__WD__WS_WT(DOTP_S_D, dotp_s.d)
@ -332,6 +389,48 @@ DO_MSA__WD__WS_WT(DOTP_U_H, dotp_u.h)
DO_MSA__WD__WS_WT(DOTP_U_W, dotp_u.w)
DO_MSA__WD__WS_WT(DOTP_U_D, dotp_u.d)
/*
* Int Max Min
* -----------
*/
DO_MSA__WD__WS_WT(MAX_A_B, max_a.b)
DO_MSA__WD__WS_WT(MAX_A_H, max_a.h)
DO_MSA__WD__WS_WT(MAX_A_W, max_a.w)
DO_MSA__WD__WS_WT(MAX_A_D, max_a.d)
DO_MSA__WD__WS_WT(MAX_S_B, max_s.b)
DO_MSA__WD__WS_WT(MAX_S_H, max_s.h)
DO_MSA__WD__WS_WT(MAX_S_W, max_s.w)
DO_MSA__WD__WS_WT(MAX_S_D, max_s.d)
DO_MSA__WD__WS_WT(MAX_U_B, max_u.b)
DO_MSA__WD__WS_WT(MAX_U_H, max_u.h)
DO_MSA__WD__WS_WT(MAX_U_W, max_u.w)
DO_MSA__WD__WS_WT(MAX_U_D, max_u.d)
DO_MSA__WD__WS_WT(MIN_A_B, min_a.b)
DO_MSA__WD__WS_WT(MIN_A_H, min_a.h)
DO_MSA__WD__WS_WT(MIN_A_W, min_a.w)
DO_MSA__WD__WS_WT(MIN_A_D, min_a.d)
DO_MSA__WD__WS_WT(MIN_S_B, min_s.b)
DO_MSA__WD__WS_WT(MIN_S_H, min_s.h)
DO_MSA__WD__WS_WT(MIN_S_W, min_s.w)
DO_MSA__WD__WS_WT(MIN_S_D, min_s.d)
DO_MSA__WD__WS_WT(MIN_U_B, min_u.b)
DO_MSA__WD__WS_WT(MIN_U_H, min_u.h)
DO_MSA__WD__WS_WT(MIN_U_W, min_u.w)
DO_MSA__WD__WS_WT(MIN_U_D, min_u.d)
/*
* Int Modulo
* ----------
*/
DO_MSA__WD__WS_WT(MOD_S_B, mod_s.b)
DO_MSA__WD__WS_WT(MOD_S_H, mod_s.h)
DO_MSA__WD__WS_WT(MOD_S_W, mod_s.w)
@ -342,30 +441,32 @@ DO_MSA__WD__WS_WT(MOD_U_H, mod_u.h)
DO_MSA__WD__WS_WT(MOD_U_W, mod_u.w)
DO_MSA__WD__WS_WT(MOD_U_D, mod_u.d)
DO_MSA__WD__WS_WT(MUL_Q_H, mul_q.h)
DO_MSA__WD__WS_WT(MUL_Q_W, mul_q.w)
DO_MSA__WD__WS_WT(MULR_Q_H, mulr_q.h)
DO_MSA__WD__WS_WT(MULR_Q_W, mulr_q.w)
/*
* Int Multiply
* ------------
*/
DO_MSA__WD__WS_WT(MADDV_B, maddv.b)
DO_MSA__WD__WS_WT(MADDV_H, maddv.h)
DO_MSA__WD__WS_WT(MADDV_W, maddv.w)
DO_MSA__WD__WS_WT(MADDV_D, maddv.d)
DO_MSA__WD__WS_WT(MSUBV_B, msubv.b)
DO_MSA__WD__WS_WT(MSUBV_H, msubv.h)
DO_MSA__WD__WS_WT(MSUBV_W, msubv.w)
DO_MSA__WD__WS_WT(MSUBV_D, msubv.d)
DO_MSA__WD__WS_WT(MULV_B, mulv.b)
DO_MSA__WD__WS_WT(MULV_H, mulv.h)
DO_MSA__WD__WS_WT(MULV_W, mulv.w)
DO_MSA__WD__WS_WT(MULV_D, mulv.d)
DO_MSA__WD__WS_WT(SUBV_B, subv.b)
DO_MSA__WD__WS_WT(SUBV_H, subv.h)
DO_MSA__WD__WS_WT(SUBV_W, subv.w)
DO_MSA__WD__WS_WT(SUBV_D, subv.d)
DO_MSA__WD__WS_WT(SUBS_S_B, subs_s.b)
DO_MSA__WD__WS_WT(SUBS_S_H, subs_s.h)
DO_MSA__WD__WS_WT(SUBS_S_W, subs_s.w)
DO_MSA__WD__WS_WT(SUBS_S_D, subs_s.d)
DO_MSA__WD__WS_WT(SUBS_U_B, subs_u.b)
DO_MSA__WD__WS_WT(SUBS_U_H, subs_u.h)
DO_MSA__WD__WS_WT(SUBS_U_W, subs_u.w)
DO_MSA__WD__WS_WT(SUBS_U_D, subs_u.d)
/*
* Int Subtract
* ------------
*/
DO_MSA__WD__WS_WT(ASUB_S_B, asub_s.b)
DO_MSA__WD__WS_WT(ASUB_S_H, asub_s.h)
@ -377,16 +478,6 @@ DO_MSA__WD__WS_WT(ASUB_U_H, asub_u.h)
DO_MSA__WD__WS_WT(ASUB_U_W, asub_u.w)
DO_MSA__WD__WS_WT(ASUB_U_D, asub_u.d)
DO_MSA__WD__WS_WT(SUBSUU_S_B, subsuu_s.b)
DO_MSA__WD__WS_WT(SUBSUU_S_H, subsuu_s.h)
DO_MSA__WD__WS_WT(SUBSUU_S_W, subsuu_s.w)
DO_MSA__WD__WS_WT(SUBSUU_S_D, subsuu_s.d)
DO_MSA__WD__WS_WT(SUBSUS_U_B, subsus_u.b)
DO_MSA__WD__WS_WT(SUBSUS_U_H, subsus_u.h)
DO_MSA__WD__WS_WT(SUBSUS_U_W, subsus_u.w)
DO_MSA__WD__WS_WT(SUBSUS_U_D, subsus_u.d)
DO_MSA__WD__WS_WT(HSUB_S_H, hsub_s.h)
DO_MSA__WD__WS_WT(HSUB_S_W, hsub_s.w)
DO_MSA__WD__WS_WT(HSUB_S_D, hsub_s.d)
@ -395,22 +486,119 @@ DO_MSA__WD__WS_WT(HSUB_U_H, hsub_u.h)
DO_MSA__WD__WS_WT(HSUB_U_W, hsub_u.w)
DO_MSA__WD__WS_WT(HSUB_U_D, hsub_u.d)
DO_MSA__WD__WS_WT(SUBS_S_B, subs_s.b)
DO_MSA__WD__WS_WT(SUBS_S_H, subs_s.h)
DO_MSA__WD__WS_WT(SUBS_S_W, subs_s.w)
DO_MSA__WD__WS_WT(SUBS_S_D, subs_s.d)
DO_MSA__WD__WS_WT(SUBS_U_B, subs_u.b)
DO_MSA__WD__WS_WT(SUBS_U_H, subs_u.h)
DO_MSA__WD__WS_WT(SUBS_U_W, subs_u.w)
DO_MSA__WD__WS_WT(SUBS_U_D, subs_u.d)
DO_MSA__WD__WS_WT(SUBSUS_U_B, subsus_u.b)
DO_MSA__WD__WS_WT(SUBSUS_U_H, subsus_u.h)
DO_MSA__WD__WS_WT(SUBSUS_U_W, subsus_u.w)
DO_MSA__WD__WS_WT(SUBSUS_U_D, subsus_u.d)
DO_MSA__WD__WS_WT(SUBSUU_S_B, subsuu_s.b)
DO_MSA__WD__WS_WT(SUBSUU_S_H, subsuu_s.h)
DO_MSA__WD__WS_WT(SUBSUU_S_W, subsuu_s.w)
DO_MSA__WD__WS_WT(SUBSUU_S_D, subsuu_s.d)
DO_MSA__WD__WS_WT(SUBV_B, subv.b)
DO_MSA__WD__WS_WT(SUBV_H, subv.h)
DO_MSA__WD__WS_WT(SUBV_W, subv.w)
DO_MSA__WD__WS_WT(SUBV_D, subv.d)
DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v)
DO_MSA__WD__WS_WT(BMZ_V, bmz.v)
/*
* Interleave
* ----------
*/
DO_MSA__WD__WS_WT(FMAX_W, fmax.w)
DO_MSA__WD__WS_WT(FMAX_D, fmax.d)
DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b)
DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h)
DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w)
DO_MSA__WD__WS_WT(ILVEV_D, ilvev.d)
DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w)
DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d)
DO_MSA__WD__WS_WT(ILVOD_B, ilvod.b)
DO_MSA__WD__WS_WT(ILVOD_H, ilvod.h)
DO_MSA__WD__WS_WT(ILVOD_W, ilvod.w)
DO_MSA__WD__WS_WT(ILVOD_D, ilvod.d)
DO_MSA__WD__WS_WT(FMIN_W, fmin.w)
DO_MSA__WD__WS_WT(FMIN_D, fmin.d)
DO_MSA__WD__WS_WT(ILVL_B, ilvl.b)
DO_MSA__WD__WS_WT(ILVL_H, ilvl.h)
DO_MSA__WD__WS_WT(ILVL_W, ilvl.w)
DO_MSA__WD__WS_WT(ILVL_D, ilvl.d)
DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w)
DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d)
DO_MSA__WD__WS_WT(ILVR_B, ilvr.b)
DO_MSA__WD__WS_WT(ILVR_H, ilvr.h)
DO_MSA__WD__WS_WT(ILVR_W, ilvr.w)
DO_MSA__WD__WS_WT(ILVR_D, ilvr.d)
/*
* Logic
* -----
*/
DO_MSA__WD__WS_WT(AND_V, and.v)
DO_MSA__WD__WS_WT(NOR_V, nor.v)
DO_MSA__WD__WS_WT(OR_V, or.v)
DO_MSA__WD__WS_WT(XOR_V, xor.v)
/*
* Pack
* ----
*/
DO_MSA__WD__WS_WT(PCKEV_B, pckev.b)
DO_MSA__WD__WS_WT(PCKEV_H, pckev.h)
DO_MSA__WD__WS_WT(PCKEV_W, pckev.w)
DO_MSA__WD__WS_WT(PCKEV_D, pckev.d)
DO_MSA__WD__WS_WT(PCKOD_B, pckod.b)
DO_MSA__WD__WS_WT(PCKOD_H, pckod.h)
DO_MSA__WD__WS_WT(PCKOD_W, pckod.w)
DO_MSA__WD__WS_WT(PCKOD_D, pckod.d)
DO_MSA__WD__WS_WT(VSHF_B, vshf.b)
DO_MSA__WD__WS_WT(VSHF_H, vshf.h)
DO_MSA__WD__WS_WT(VSHF_W, vshf.w)
DO_MSA__WD__WS_WT(VSHF_D, vshf.d)
/*
* Shift
* -----
*/
DO_MSA__WD__WS_WT(SLL_B, sll.b)
DO_MSA__WD__WS_WT(SLL_H, sll.h)
DO_MSA__WD__WS_WT(SLL_W, sll.w)
DO_MSA__WD__WS_WT(SLL_D, sll.d)
DO_MSA__WD__WS_WT(SRA_B, sra.b)
DO_MSA__WD__WS_WT(SRA_H, sra.h)
DO_MSA__WD__WS_WT(SRA_W, sra.w)
DO_MSA__WD__WS_WT(SRA_D, sra.d)
DO_MSA__WD__WS_WT(SRAR_B, srar.b)
DO_MSA__WD__WS_WT(SRAR_H, srar.h)
DO_MSA__WD__WS_WT(SRAR_W, srar.w)
DO_MSA__WD__WS_WT(SRAR_D, srar.d)
DO_MSA__WD__WS_WT(SRL_B, srl.b)
DO_MSA__WD__WS_WT(SRL_H, srl.h)
DO_MSA__WD__WS_WT(SRL_W, srl.w)
DO_MSA__WD__WS_WT(SRL_D, srl.d)
DO_MSA__WD__WS_WT(SRLR_B, srlr.b)
DO_MSA__WD__WS_WT(SRLR_H, srlr.h)
DO_MSA__WD__WS_WT(SRLR_W, srlr.w)
DO_MSA__WD__WS_WT(SRLR_D, srlr.d)
#endif

20
tests/tcg/mips/user/ase/msa/README Normal file
View File

@ -0,0 +1,20 @@
The tests in subdirectories of this directory are supposed to be compiled for
mips64el MSA-enabled CPU (I6400, I6500), using an appropriate MIPS toolchain.
For example:
/opt/img/bin/mips-img-linux-gnu-gcc <source file> \
-EL -static -mabi=64 -march=mips64r6 -mmsa -o <executable file>
They are to be executed using QEMU user mode, using command line:
mips64el-linux-user/qemu-mips64el -cpu I6400 <executable file>
Helper scripts test_msa_compile.sh and test_msa_run.sh are also
provided. This is an example of compilation and execution of all
MSA tests:
cd <QEMU root directory>
cd tests/tcg/mips/user/ase/msa
./test_msa_compile.sh
./test_msa_run.sh

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nloc_b.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0100010104000201ULL, 0x0200020200000003ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nloc_d.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000000000000001ULL, 0x0000000000000002ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nloc_h.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0001000100040002ULL, 0x0002000200000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nloc_w.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000000100000004ULL, 0x0000000200000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nlzc_b.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0001000000010000ULL, 0x0001000001010300ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nlzc_d.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nlzc_h.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000010003ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_nlzc_w.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000001ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_pcnt_b.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0404050305040605ULL, 0x0404050504030405ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_pcnt_d.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000000000000024ULL, 0x0000000000000022ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_pcnt_h.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x000800080009000bULL, 0x0008000a00070009ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-count/test_msa_pcnt_w.c
View File

@ -121,6 +121,8 @@ int32_t main(void)
{ 0x0000001000000014ULL, 0x0000001200000010ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < TEST_COUNT_TOTAL; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_b.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f164d1e31e20eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_d.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f164d5e31a24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_h.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f164d5e31a24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_w.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f164d5e31a24eULL, 0x8cf188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_b.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x71cf566d1e33e60eULL, 0xadf389d9ab46e6a1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_d.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f164d5e31a24eULL, 0x8df188d9a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_h.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0xf04f364d5e33a24eULL, 0x8df389d8a946e2a1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_w.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f364d5e31a24eULL, 0x8cf188d8a942e2a1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_b.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x71cf566d5e33e64eULL, 0xadf389d9ab46e6a1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_d.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d9a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_h.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0xf04f364d5e33e24eULL, 0x8df389d8a946e2a1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_w.c
View File

@ -123,6 +123,8 @@ int32_t main(void)
{ 0x704f364d5e31e24eULL, 0x8df188d8a942e2a1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mul_q_h.c → tests/tcg/mips/user/ase/msa/fixed-multiply/test_msa_mul_q_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x628a03e2455006e3ULL, 0x65a26eec3ac806bdULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mul_q_w.c → tests/tcg/mips/user/ase/msa/fixed-multiply/test_msa_mul_q_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x628a97e4455157d3ULL, 0x65a1c5e13ac736e1ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulr_q_h.c → tests/tcg/mips/user/ase/msa/fixed-multiply/test_msa_mulr_q_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x628a03e3455006e4ULL, 0x65a36eec3ac806beULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulr_q_w.c → tests/tcg/mips/user/ase/msa/fixed-multiply/test_msa_mulr_q_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x628a97e4455157d3ULL, 0x65a1c5e23ac736e2ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

155
tests/tcg/mips/user/ase/msa/float-max-min/test_msa_fmax_a_d.c Normal file
View File

@ -0,0 +1,155 @@
/*
* Test program for MSA instruction FMAX_A.D
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMAX_A.D";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xc71c71c71c71c71cULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xe38e38e38e38e38eULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xe38e38e38e38e38eULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x3333333333333333ULL, 0xc71c71c71c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x5555555555555555ULL, },
{ 0xe38e38e38e38e38eULL, 0xccccccccccccccccULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xc71c71c71c71c71cULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0xc71c71c71c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0xfbbe00634d93c708ULL, 0x4b670b5efe7bb00cULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x4b670b5efe7bb00cULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x4b670b5efe7bb00cULL, }, /* 72 */
{ 0xfbbe00634d93c708ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_A_D(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_A_D(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
tests/tcg/mips/user/ase/msa/float-max-min/test_msa_fmax_a_w.c Normal file
View File

@ -0,0 +1,155 @@
/*
* Test program for MSA instruction FMAX_A.W
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMAX_A.W";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e3aaaaaaaaULL, 0x38e38e38e38e38e3ULL, },
{ 0xaaaaaaaa71c71c71ULL, 0xc71c71c7aaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xe38e38e355555555ULL, 0x55555555e38e38e3ULL, },
{ 0x5555555571c71c71ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xe38e38e3ccccccccULL, 0xcccccccce38e38e3ULL, },
{ 0xcccccccc71c71c71ULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e333333333ULL, 0x38e38e38e38e38e3ULL, },
{ 0x3333333371c71c71ULL, 0xc71c71c733333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e3aaaaaaaaULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e355555555ULL, 0x55555555e38e38e3ULL, },
{ 0xe38e38e3ccccccccULL, 0xcccccccce38e38e3ULL, },
{ 0xe38e38e333333333ULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e371c71c71ULL, 0xc71c71c7e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xaaaaaaaa71c71c71ULL, 0xc71c71c7aaaaaaaaULL, },
{ 0x5555555571c71c71ULL, 0x5555555555555555ULL, },
{ 0xcccccccc71c71c71ULL, 0xccccccccccccccccULL, },
{ 0x3333333371c71c71ULL, 0xc71c71c733333333ULL, },
{ 0xe38e38e371c71c71ULL, 0xc71c71c7e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0xfbbe00634d93c708ULL, 0x4b670b5efe7bb00cULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x4b670b5efe7bb00cULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xfbbe00635e31e24eULL, 0x12f7bb1aa942e2a0ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x4b670b5efe7bb00cULL, }, /* 72 */
{ 0xfbbe00634d93c708ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00635e31e24eULL, 0x12f7bb1aa942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_A_W(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_A_W(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
tests/tcg/mips/user/ase/msa/float-max-min/test_msa_fmax_d.c Normal file
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@ -0,0 +1,155 @@
/*
* Test program for MSA instruction FMAX.D
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMAX.D";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x0000000000000000ULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xccccccccccccccccULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x38e38e38e38e38e3ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0x0000000000000000ULL, 0x38e38e38e38e38e3ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0x38e38e38e38e38e3ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0x38e38e38e38e38e3ULL, },
{ 0x3333333333333333ULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x1c71c71c71c71c71ULL, 0x0000000000000000ULL, },
{ 0x1c71c71c71c71c71ULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x1c71c71c71c71c71ULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5efe7bb00cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x12f7bb1a153f52fcULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 72 */
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5efe7bb00cULL, },
{ 0x704f164d5e31e24eULL, 0x12f7bb1a153f52fcULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_D(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_D(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
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/*
* Test program for MSA instruction FMAX.W
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMAX.W";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x0000000000000000ULL, 0x38e38e3800000000ULL, },
{ 0x1c71c71c71c71c71ULL, 0x000000001c71c71cULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xaaaaaaaa8e38e38eULL, 0x38e38e38aaaaaaaaULL, },
{ 0x1c71c71c71c71c71ULL, 0xaaaaaaaa1c71c71cULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x5555555571c71c71ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xcccccccc8e38e38eULL, 0x38e38e38ccccccccULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x38e38e3833333333ULL, },
{ 0x3333333371c71c71ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0x0000000000000000ULL, 0x38e38e3800000000ULL, },
{ 0xaaaaaaaa8e38e38eULL, 0x38e38e38aaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xcccccccc8e38e38eULL, 0x38e38e38ccccccccULL, },
{ 0x3333333333333333ULL, 0x38e38e3833333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0x38e38e381c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x1c71c71c71c71c71ULL, 0x000000001c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xaaaaaaaa1c71c71cULL, },
{ 0x5555555571c71c71ULL, 0x5555555555555555ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x3333333371c71c71ULL, 0x3333333333333333ULL, },
{ 0x1c71c71c71c71c71ULL, 0x38e38e381c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0x886ae6cc4d93c708ULL, 0x4b670b5e153f52fcULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5eab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5ea942e2a0ULL, },
{ 0x886ae6cc4d93c708ULL, 0x4b670b5e153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaa4d93c708ULL, 0x27d8c6ff153f52fcULL, },
{ 0x704f164d5e31e24eULL, 0x12f7bb1a153f52fcULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5eab2b2514ULL, }, /* 72 */
{ 0xac5aaeaa4d93c708ULL, 0x27d8c6ff153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffa942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x4b670b5ea942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x12f7bb1a153f52fcULL, },
{ 0x704f164d5e31e24eULL, 0x27d8c6ffa942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_W(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMAX_W(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
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/*
* Test program for MSA instruction FMIN_A.D
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMIN_A.D";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x1c71c71c71c71c71ULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x5555555555555555ULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xccccccccccccccccULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x1c71c71c71c71c71ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x38e38e38e38e38e3ULL, },
{ 0xccccccccccccccccULL, 0x38e38e38e38e38e3ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x1c71c71c71c71c71ULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0x3333333333333333ULL, },
{ 0x1c71c71c71c71c71ULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0x886ae6cc28625540ULL, 0x12f7bb1a153f52fcULL, },
{ 0x886ae6cc28625540ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8a942e2a0ULL, },
{ 0x886ae6cc28625540ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x12f7bb1a153f52fcULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
{ 0x886ae6cc28625540ULL, 0x27d8c6ffab2b2514ULL, }, /* 72 */
{ 0xac5aaeaab9cf8b80ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8a942e2a0ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8a942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8a942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_A_D(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_A_D(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
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/*
* Test program for MSA instruction FMIN_A.W
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMIN_A.W";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaa8e38e38eULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x1c71c71caaaaaaaaULL, 0xaaaaaaaa1c71c71cULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x555555558e38e38eULL, 0x38e38e3855555555ULL, },
{ 0x1c71c71c55555555ULL, 0xc71c71c71c71c71cULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xcccccccc8e38e38eULL, 0x38e38e38ccccccccULL, },
{ 0x1c71c71cccccccccULL, 0xc71c71c71c71c71cULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0x333333338e38e38eULL, 0x3333333333333333ULL, },
{ 0x1c71c71c33333333ULL, 0x333333331c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaa8e38e38eULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x555555558e38e38eULL, 0x38e38e3855555555ULL, },
{ 0xcccccccc8e38e38eULL, 0x38e38e38ccccccccULL, },
{ 0x333333338e38e38eULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c8e38e38eULL, 0x38e38e381c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0x1c71c71caaaaaaaaULL, 0xaaaaaaaa1c71c71cULL, },
{ 0x1c71c71c55555555ULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71cccccccccULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c33333333ULL, 0x333333331c71c71cULL, },
{ 0x1c71c71c8e38e38eULL, 0x38e38e381c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0x886ae6cc28625540ULL, 0x12f7bb1a153f52fcULL, },
{ 0x886ae6cc28625540ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8a942e2a0ULL, },
{ 0x886ae6cc28625540ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x12f7bb1a153f52fcULL, },
{ 0x704f164d4d93c708ULL, 0x8df188d8153f52fcULL, },
{ 0x886ae6cc28625540ULL, 0x27d8c6ffab2b2514ULL, }, /* 72 */
{ 0xac5aaeaab9cf8b80ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8a942e2a0ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8a942e2a0ULL, },
{ 0x704f164d4d93c708ULL, 0x8df188d8153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8a942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_A_W(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_A_W(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
tests/tcg/mips/user/ase/msa/float-max-min/test_msa_fmin_d.c Normal file
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@ -0,0 +1,155 @@
/*
* Test program for MSA instruction FMIN.D
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMIN.D";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xe38e38e38e38e38eULL, 0x0000000000000000ULL, },
{ 0x0000000000000000ULL, 0xc71c71c71c71c71cULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xe38e38e38e38e38eULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xc71c71c71c71c71cULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xe38e38e38e38e38eULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x3333333333333333ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0xe38e38e38e38e38eULL, 0x0000000000000000ULL, },
{ 0xe38e38e38e38e38eULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0xccccccccccccccccULL, },
{ 0xe38e38e38e38e38eULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x0000000000000000ULL, 0xc71c71c71c71c71cULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0xc71c71c71c71c71cULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8a942e2a0ULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe00634d93c708ULL, 0x8df188d8a942e2a0ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, }, /* 72 */
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8a942e2a0ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8a942e2a0ULL, },
{ 0xfbbe00634d93c708ULL, 0x8df188d8a942e2a0ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8a942e2a0ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_D(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_D(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

155
tests/tcg/mips/user/ase/msa/float-max-min/test_msa_fmin_w.c Normal file
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@ -0,0 +1,155 @@
/*
* Test program for MSA instruction FMIN.W
*
* Copyright (C) 2019 Wave Computing, Inc.
* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include <sys/time.h>
#include <stdint.h>
#include "../../../../include/wrappers_msa.h"
#include "../../../../include/test_inputs_128.h"
#include "../../../../include/test_utils_128.h"
#define TEST_COUNT_TOTAL ( \
(PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
(RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
int32_t main(void)
{
char *instruction_name = "FMIN.W";
int32_t ret;
uint32_t i, j;
struct timeval start, end;
double elapsed_time;
uint64_t b128_result[TEST_COUNT_TOTAL][2];
uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xe38e38e38e38e38eULL, 0x00000000e38e38e3ULL, },
{ 0x0000000000000000ULL, 0xc71c71c700000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0xe38e38e3aaaaaaaaULL, 0xaaaaaaaae38e38e3ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xc71c71c7aaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x5555555555555555ULL, 0x5555555555555555ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0x1c71c71c55555555ULL, 0xc71c71c71c71c71cULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0xe38e38e3ccccccccULL, 0xcccccccce38e38e3ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x3333333333333333ULL, 0x3333333333333333ULL, },
{ 0xe38e38e38e38e38eULL, 0x33333333e38e38e3ULL, },
{ 0x1c71c71c33333333ULL, 0xc71c71c71c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */
{ 0xe38e38e38e38e38eULL, 0x00000000e38e38e3ULL, },
{ 0xe38e38e3aaaaaaaaULL, 0xaaaaaaaae38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e3ccccccccULL, 0xcccccccce38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x33333333e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
{ 0xe38e38e38e38e38eULL, 0xc71c71c7e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */
{ 0x0000000000000000ULL, 0xc71c71c700000000ULL, },
{ 0xaaaaaaaaaaaaaaaaULL, 0xc71c71c7aaaaaaaaULL, },
{ 0x1c71c71c55555555ULL, 0xc71c71c71c71c71cULL, },
{ 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
{ 0x1c71c71c33333333ULL, 0xc71c71c71c71c71cULL, },
{ 0xe38e38e38e38e38eULL, 0xc71c71c7e38e38e3ULL, },
{ 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
{ 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */
{ 0xfbbe006328625540ULL, 0x12f7bb1afe7bb00cULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6fffe7bb00cULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8fe7bb00cULL, },
{ 0xfbbe006328625540ULL, 0x12f7bb1afe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, },
{ 0xfbbe0063b9cf8b80ULL, 0x12f7bb1aab2b2514ULL, },
{ 0xfbbe00634d93c708ULL, 0x8df188d8a942e2a0ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6fffe7bb00cULL, }, /* 72 */
{ 0xfbbe0063b9cf8b80ULL, 0x12f7bb1aab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8ab2b2514ULL, },
{ 0x886ae6cc28625540ULL, 0x8df188d8fe7bb00cULL, },
{ 0xfbbe00634d93c708ULL, 0x8df188d8a942e2a0ULL, },
{ 0xac5aaeaab9cf8b80ULL, 0x8df188d8ab2b2514ULL, },
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_W(b128_pattern[i], b128_pattern[j],
b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
}
}
for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
do_msa_FMIN_W(b128_random[i], b128_random[j],
b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
(PATTERN_INPUTS_SHORT_COUNT)) +
RANDOM_INPUTS_SHORT_COUNT * i + j]);
}
}
gettimeofday(&end, NULL);
elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
ret = check_results(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
&b128_result[0][0], &b128_expect[0][0]);
return ret;
}

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc623c9cULL, 0xe61ef050ae843cc0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc63c49cULL, 0xe41cee4ead7a3ac0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc623b64ULL, 0xe41eee50ad7c3ac0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc63c49cULL, 0xe41cee50ad7a3ac0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7f7f2c7f7f623c7fULL, 0x7f1e7f507f7f3c7fULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7fffffffffffffffULL, 0x7fffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7fff2c9a7fff3b64ULL, 0x7fff7fff7fff3ac0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7fffffff7fffffffULL, 0x7fffffff7fffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7f7f2c7f7f62c47fULL, 0x80e280b0807fc480ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7fffffffffffffffULL, 0x8000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7fff2c9a7fffc49cULL, 0x800080008000c540ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x7fffffff7fffffffULL, 0x8000000080000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc62ff9cULL, 0xffffffffff84ffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc63c49cULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc62ffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc63c49cULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc62c49cULL, 0x1ae210b05284c440ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc63c49cULL, 0x1be311b15285c540ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc62c49cULL, 0x1be211b05284c540ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xe09e2c9abc63c49cULL, 0x1be311b05285c540ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x00000000ce80f89bULL, 0xffffffff37346b78ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x00bf0063008f0030ULL, 0xff7eff60ffebff82ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000869c0000407fULL, 0xffff16c9ffff8be2ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x00000000ce80f89bULL, 0x0000000137346b78ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x00bf0063008f0130ULL, 0x017e016000eb0182ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000869c0001407fULL, 0x000116c900018be2ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_w.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_b.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_d.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

2
tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_h.c
View File

@ -125,6 +125,8 @@ int32_t main(void)
{ 0x0000000000000000ULL, 0x0000000000000000ULL, },
};
reset_msa_registers();
gettimeofday(&start, NULL);
for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {

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