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target/mips: Simplify MSA TCG logic 

Only decode MSA opcodes if MSA is present (implemented).

Now than check_msa_access() will only be called if MSA is
present, the only way to have MIPS_HFLAG_MSA unset is if
MSA is disabled (bit CP0C5_MSAEn cleared, see previous
commit). Therefore we can remove the 'reserved instruction'
exception.

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201208003702.4088927-5-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-11-29 23:39:04 +01:00
parent aa314198ca
commit 33942f9460
1 changed files with 11 additions and 12 deletions
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23
target/mips/translate.c
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@ -28567,13 +28567,8 @@ static inline int check_msa_access(DisasContext *ctx)
}
if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) {
if (ctx->insn_flags & ASE_MSA) {
generate_exception_end(ctx, EXCP_MSADIS);
return 0;
} else {
gen_reserved_instruction(ctx);
return 0;
}
generate_exception_end(ctx, EXCP_MSADIS);
return 0;
}
return 1;
}
@ -30417,7 +30412,7 @@ static void gen_msa_vec(CPUMIPSState *env, DisasContext *ctx)
static void gen_msa(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opcode = ctx->opcode;
check_insn(ctx, ASE_MSA);
check_msa_access(ctx);
switch (MASK_MSA_MINOR(opcode)) {
@ -31047,9 +31042,11 @@ static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx)
case OPC_BNZ_H:
case OPC_BNZ_W:
case OPC_BNZ_D:
check_insn(ctx, ASE_MSA);
gen_msa_branch(env, ctx, op1);
break;
if (ase_msa_available(env)) {
gen_msa_branch(env, ctx, op1);
break;
}
/* fall through */
default:
MIPS_INVAL("cp1");
gen_reserved_instruction(ctx);
@ -31238,7 +31235,9 @@ static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx)
#endif
} else {
/* MDMX: Not implemented. */
gen_msa(env, ctx);
if (ase_msa_available(env)) {
gen_msa(env, ctx);
}
}
break;
case OPC_PCREL: