mirror of https://gitee.com/openkylin/qemu.git
mips: Support the MT TCStatus IXMT irq disable flag
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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parent
c4cb2578b5
commit
344eecf699
target-mips
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@ -537,6 +537,10 @@ static inline int cpu_mips_hw_interrupts_pending(CPUState *env)
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if (!(env->CP0_Status & (1 << CP0St_IE)) ||
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if (!(env->CP0_Status & (1 << CP0St_IE)) ||
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(env->CP0_Status & (1 << CP0St_EXL)) ||
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(env->CP0_Status & (1 << CP0St_EXL)) ||
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(env->CP0_Status & (1 << CP0St_ERL)) ||
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(env->CP0_Status & (1 << CP0St_ERL)) ||
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/* Note that the TCStatus IXMT field is initialized to zero,
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and only MT capable cores can set it to one. So we don't
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need to check for MT capabilities here. */
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(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)) ||
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(env->hflags & MIPS_HFLAG_DM)) {
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(env->hflags & MIPS_HFLAG_DM)) {
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/* Interrupts are disabled */
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/* Interrupts are disabled */
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return 0;
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return 0;
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