mirror of https://gitee.com/openkylin/qemu.git
ppc/pnv: Add a PNOR model
On a POWERPC PowerNV system, the host firmware is stored in a PNOR flash chip which contents is mapped on the LPC bus. This model adds a simple dummy device to map the contents of a block device in the host address space. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191021131215.3693-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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cb88904a54
commit
35dde57662
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@ -9,7 +9,9 @@ obj-$(CONFIG_PSERIES) += spapr_tpm_proxy.o
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obj-$(CONFIG_SPAPR_RNG) += spapr_rng.o
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# IBM PowerNV
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obj-$(CONFIG_POWERNV) += pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.o pnv_occ.o pnv_bmc.o
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obj-$(CONFIG_POWERNV) += pnv_homer.o
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obj-$(CONFIG_POWERNV) += pnv_homer.o pnv_pnor.o
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ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy)
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obj-y += spapr_pci_vfio.o spapr_pci_nvlink2.o
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endif
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14
hw/ppc/pnv.c
14
hw/ppc/pnv.c
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@ -44,6 +44,7 @@
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#include "hw/ppc/xics.h"
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#include "hw/qdev-properties.h"
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#include "hw/ppc/pnv_xscom.h"
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#include "hw/ppc/pnv_pnor.h"
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#include "hw/isa/isa.h"
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#include "hw/boards.h"
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@ -633,6 +634,8 @@ static void pnv_init(MachineState *machine)
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long fw_size;
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int i;
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char *chip_typename;
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DriveInfo *pnor = drive_get(IF_MTD, 0, 0);
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DeviceState *dev;
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/* allocate RAM */
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if (machine->ram_size < (1 * GiB)) {
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@ -644,6 +647,17 @@ static void pnv_init(MachineState *machine)
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machine->ram_size);
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memory_region_add_subregion(get_system_memory(), 0, ram);
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/*
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* Create our simple PNOR device
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*/
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dev = qdev_create(NULL, TYPE_PNV_PNOR);
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if (pnor) {
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qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(pnor),
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&error_abort);
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}
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qdev_init_nofail(dev);
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pnv->pnor = PNV_PNOR(dev);
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/* load skiboot firmware */
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if (bios_name == NULL) {
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bios_name = FW_FILE_NAME;
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@ -0,0 +1,135 @@
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/*
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* QEMU PowerNV PNOR simple model
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*
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* Copyright (c) 2015-2019, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "qemu/log.h"
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#include "sysemu/block-backend.h"
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#include "sysemu/blockdev.h"
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#include "hw/loader.h"
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#include "hw/ppc/pnv_pnor.h"
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#include "hw/qdev-properties.h"
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static uint64_t pnv_pnor_read(void *opaque, hwaddr addr, unsigned size)
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{
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PnvPnor *s = PNV_PNOR(opaque);
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uint64_t ret = 0;
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int i;
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for (i = 0; i < size; i++) {
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ret |= (uint64_t) s->storage[addr + i] << (8 * (size - i - 1));
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}
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return ret;
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}
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static void pnv_pnor_update(PnvPnor *s, int offset, int size)
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{
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int offset_end;
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if (s->blk) {
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return;
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}
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offset_end = offset + size;
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offset = QEMU_ALIGN_DOWN(offset, BDRV_SECTOR_SIZE);
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offset_end = QEMU_ALIGN_UP(offset_end, BDRV_SECTOR_SIZE);
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blk_pwrite(s->blk, offset, s->storage + offset,
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offset_end - offset, 0);
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}
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static void pnv_pnor_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned size)
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{
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PnvPnor *s = PNV_PNOR(opaque);
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int i;
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for (i = 0; i < size; i++) {
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s->storage[addr + i] = (data >> (8 * (size - i - 1))) & 0xFF;
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}
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pnv_pnor_update(s, addr, size);
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}
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/*
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* TODO: Check endianness: skiboot is BIG, Aspeed AHB is LITTLE, flash
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* is BIG.
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*/
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static const MemoryRegionOps pnv_pnor_ops = {
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.read = pnv_pnor_read,
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.write = pnv_pnor_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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};
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static void pnv_pnor_realize(DeviceState *dev, Error **errp)
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{
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PnvPnor *s = PNV_PNOR(dev);
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int ret;
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if (s->blk) {
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uint64_t perm = BLK_PERM_CONSISTENT_READ |
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(blk_is_read_only(s->blk) ? 0 : BLK_PERM_WRITE);
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ret = blk_set_perm(s->blk, perm, BLK_PERM_ALL, errp);
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if (ret < 0) {
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return;
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}
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s->size = blk_getlength(s->blk);
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if (s->size <= 0) {
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error_setg(errp, "failed to get flash size");
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return;
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}
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s->storage = blk_blockalign(s->blk, s->size);
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if (blk_pread(s->blk, 0, s->storage, s->size) != s->size) {
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error_setg(errp, "failed to read the initial flash content");
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return;
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}
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} else {
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s->storage = blk_blockalign(NULL, s->size);
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memset(s->storage, 0xFF, s->size);
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}
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memory_region_init_io(&s->mmio, OBJECT(s), &pnv_pnor_ops, s,
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TYPE_PNV_PNOR, s->size);
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}
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static Property pnv_pnor_properties[] = {
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DEFINE_PROP_UINT32("size", PnvPnor, size, 128 << 20),
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DEFINE_PROP_DRIVE("drive", PnvPnor, blk),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pnv_pnor_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = pnv_pnor_realize;
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dc->props = pnv_pnor_properties;
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}
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static const TypeInfo pnv_pnor_info = {
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.name = TYPE_PNV_PNOR,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(PnvPnor),
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.class_init = pnv_pnor_class_init,
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};
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static void pnv_pnor_register_types(void)
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{
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type_register_static(&pnv_pnor_info);
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}
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type_init(pnv_pnor_register_types)
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@ -24,6 +24,7 @@
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#include "hw/sysbus.h"
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#include "hw/ipmi/ipmi.h"
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#include "hw/ppc/pnv_lpc.h"
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#include "hw/ppc/pnv_pnor.h"
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#include "hw/ppc/pnv_psi.h"
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#include "hw/ppc/pnv_occ.h"
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#include "hw/ppc/pnv_homer.h"
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@ -175,6 +176,8 @@ typedef struct PnvMachineState {
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IPMIBmc *bmc;
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Notifier powerdown_notifier;
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PnvPnor *pnor;
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} PnvMachineState;
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static inline bool pnv_chip_is_power9(const PnvChip *chip)
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@ -0,0 +1,25 @@
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/*
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* QEMU PowerNV PNOR simple model
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*
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* Copyright (c) 2019, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef _PPC_PNV_PNOR_H
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#define _PPC_PNV_PNOR_H
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#define TYPE_PNV_PNOR "pnv-pnor"
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#define PNV_PNOR(obj) OBJECT_CHECK(PnvPnor, (obj), TYPE_PNV_PNOR)
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typedef struct PnvPnor {
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SysBusDevice parent_obj;
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BlockBackend *blk;
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uint8_t *storage;
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uint32_t size;
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MemoryRegion mmio;
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} PnvPnor;
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#endif /* _PPC_PNV_PNOR_H */
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