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microblaze/petalogix_s3adsp1800_mmu: Fix UART IRQ 

The UART IRQ is edge sensitive, whereas the machine was registering it
as level sensitive. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Peter Crosthwaite 2013-06-11 10:57:41 +10:00 committed by Edgar E. Iglesias
parent 21a885a7e2
commit 37a011e9ba
1 changed files with 1 additions and 1 deletions
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hw/microblaze/petalogix_s3adsp1800_mmu.c
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@ -97,7 +97,7 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
1, 0x89, 0x18, 0x0000, 0x0, 1);
cpu_irq = microblaze_pic_init_cpu(env);
dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 2);
dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 0xA);
for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(dev, i);
}