mirror of https://gitee.com/openkylin/qemu.git
e1000: Implementing various counters
This implements the following Statistic registers (various counters) according to Intel's specs: TSCTC GOTCL GOTCH GORCL GORCH MPRC BPRC RUC ROC BPTC MPTC PTC... PRC... PLEASE NOTE: these registers will not be active, nor will migrate, until a compatibility flag will be set (in the next patch in this series). Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
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@ -37,6 +37,8 @@
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#include "e1000_regs.h"
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static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
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#define E1000_DEBUG
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#ifdef E1000_DEBUG
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@ -182,7 +184,13 @@ enum {
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defreg(DC), defreg(TNCRS), defreg(SEC), defreg(CEXTERR),
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defreg(RLEC), defreg(XONRXC), defreg(XONTXC), defreg(XOFFRXC),
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defreg(XOFFTXC), defreg(RFC), defreg(RJC), defreg(RNBC),
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defreg(TSCTFC), defreg(MGTPRC), defreg(MGTPDC), defreg(MGTPTC)
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defreg(TSCTFC), defreg(MGTPRC), defreg(MGTPDC), defreg(MGTPTC),
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defreg(RUC), defreg(ROC), defreg(GORCL), defreg(GORCH),
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defreg(GOTCL), defreg(GOTCH), defreg(BPRC), defreg(MPRC),
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defreg(TSCTC), defreg(PRC64), defreg(PRC127), defreg(PRC255),
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defreg(PRC511), defreg(PRC1023), defreg(PRC1522), defreg(PTC64),
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defreg(PTC127), defreg(PTC255), defreg(PTC511), defreg(PTC1023),
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defreg(PTC1522), defreg(MPTC), defreg(BPTC)
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};
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static void
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@ -588,6 +596,16 @@ inc_reg_if_not_full(E1000State *s, int index)
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}
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}
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static inline void
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inc_tx_bcast_or_mcast_count(E1000State *s, const unsigned char *arr)
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{
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if (!memcmp(arr, bcast, sizeof bcast)) {
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inc_reg_if_not_full(s, BPTC);
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} else if (arr[0] & 1) {
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inc_reg_if_not_full(s, MPTC);
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}
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}
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static void
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grow_8reg_if_not_full(E1000State *s, int index, int size)
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{
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@ -602,6 +620,24 @@ grow_8reg_if_not_full(E1000State *s, int index, int size)
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s->mac_reg[index+1] = sum >> 32;
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}
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static void
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increase_size_stats(E1000State *s, const int *size_regs, int size)
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{
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if (size > 1023) {
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inc_reg_if_not_full(s, size_regs[5]);
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} else if (size > 511) {
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inc_reg_if_not_full(s, size_regs[4]);
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} else if (size > 255) {
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inc_reg_if_not_full(s, size_regs[3]);
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} else if (size > 127) {
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inc_reg_if_not_full(s, size_regs[2]);
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} else if (size > 64) {
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inc_reg_if_not_full(s, size_regs[1]);
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} else if (size == 64) {
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inc_reg_if_not_full(s, size_regs[0]);
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}
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}
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static inline int
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vlan_enabled(E1000State *s)
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{
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@ -639,12 +675,17 @@ fcs_len(E1000State *s)
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static void
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e1000_send_packet(E1000State *s, const uint8_t *buf, int size)
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{
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static const int PTCregs[6] = { PTC64, PTC127, PTC255, PTC511,
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PTC1023, PTC1522 };
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NetClientState *nc = qemu_get_queue(s->nic);
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if (s->phy_reg[PHY_CTRL] & MII_CR_LOOPBACK) {
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nc->info->receive(nc, buf, size);
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} else {
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qemu_send_packet(nc, buf, size);
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}
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inc_tx_bcast_or_mcast_count(s, buf);
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increase_size_stats(s, PTCregs, size);
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}
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static void
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@ -671,8 +712,11 @@ xmit_seg(E1000State *s)
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if (tp->tcp) {
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sofar = frames * tp->mss;
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stl_be_p(tp->data+css+4, ldl_be_p(tp->data+css+4)+sofar); /* seq */
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if (tp->paylen - sofar > tp->mss)
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if (tp->paylen - sofar > tp->mss) {
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tp->data[css + 13] &= ~9; /* PSH, FIN */
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} else if (frames) {
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inc_reg_if_not_full(s, TSCTC);
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}
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} else /* UDP */
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stw_be_p(tp->data+css+4, len);
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if (tp->sum_needed & E1000_TXD_POPTS_TXSM) {
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@ -702,6 +746,8 @@ xmit_seg(E1000State *s)
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inc_reg_if_not_full(s, TPT);
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grow_8reg_if_not_full(s, TOTL, s->tx.size);
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s->mac_reg[GPTC] = s->mac_reg[TPT];
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s->mac_reg[GOTCL] = s->mac_reg[TOTL];
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s->mac_reg[GOTCH] = s->mac_reg[TOTH];
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}
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static void
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@ -869,7 +915,6 @@ start_xmit(E1000State *s)
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static int
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receive_filter(E1000State *s, const uint8_t *buf, int size)
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{
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static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
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static const int mta_shift[] = {4, 3, 2, 0};
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uint32_t f, rctl = s->mac_reg[RCTL], ra[2], *rp;
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int isbcast = !memcmp(buf, bcast, sizeof bcast), ismcast = (buf[0] & 1);
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@ -887,10 +932,12 @@ receive_filter(E1000State *s, const uint8_t *buf, int size)
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}
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if (ismcast && (rctl & E1000_RCTL_MPE)) { /* promiscuous mcast */
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inc_reg_if_not_full(s, MPRC);
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return 1;
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}
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if (isbcast && (rctl & E1000_RCTL_BAM)) { /* broadcast enabled */
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inc_reg_if_not_full(s, BPRC);
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return 1;
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}
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@ -912,8 +959,10 @@ receive_filter(E1000State *s, const uint8_t *buf, int size)
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f = mta_shift[(rctl >> E1000_RCTL_MO_SHIFT) & 3];
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f = (((buf[5] << 8) | buf[4]) >> f) & 0xfff;
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if (s->mac_reg[MTA + (f >> 5)] & (1 << (f & 0x1f)))
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if (s->mac_reg[MTA + (f >> 5)] & (1 << (f & 0x1f))) {
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inc_reg_if_not_full(s, MPRC);
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return 1;
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}
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DBGOUT(RXFILTER,
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"dropping, inexact filter mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] %x\n",
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buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
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@ -1002,6 +1051,8 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
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size_t desc_offset;
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size_t desc_size;
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size_t total_size;
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static const int PRCregs[6] = { PRC64, PRC127, PRC255, PRC511,
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PRC1023, PRC1522 };
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if (!(s->mac_reg[STATUS] & E1000_STATUS_LU)) {
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return -1;
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@ -1015,6 +1066,7 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
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if (size < sizeof(min_buf)) {
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iov_to_buf(iov, iovcnt, 0, min_buf, size);
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memset(&min_buf[size], 0, sizeof(min_buf) - size);
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inc_reg_if_not_full(s, RUC);
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min_iov.iov_base = filter_buf = min_buf;
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min_iov.iov_len = size = sizeof(min_buf);
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iovcnt = 1;
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@ -1030,6 +1082,7 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
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(size > MAXIMUM_ETHERNET_VLAN_SIZE
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&& !(s->mac_reg[RCTL] & E1000_RCTL_LPE)))
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&& !(s->mac_reg[RCTL] & E1000_RCTL_SBP)) {
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inc_reg_if_not_full(s, ROC);
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return size;
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}
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@ -1115,6 +1168,7 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
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}
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} while (desc_offset < total_size);
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increase_size_stats(s, PRCregs, total_size);
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inc_reg_if_not_full(s, TPR);
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s->mac_reg[GPRC] = s->mac_reg[TPR];
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/* TOR - Total Octets Received:
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@ -1123,6 +1177,8 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
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* Always include FCS length (4) in size.
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*/
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grow_8reg_if_not_full(s, TORL, size+4);
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s->mac_reg[GORCL] = s->mac_reg[TORL];
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s->mac_reg[GORCH] = s->mac_reg[TORH];
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n = E1000_ICS_RXT0;
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if ((rdt = s->mac_reg[RDT]) < s->mac_reg[RDH])
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@ -1285,11 +1341,23 @@ static uint32_t (*macreg_readops[])(E1000State *, int) = {
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getreg(TNCRS), getreg(SEC), getreg(CEXTERR), getreg(RLEC),
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getreg(XONRXC), getreg(XONTXC), getreg(XOFFRXC), getreg(XOFFTXC),
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getreg(RFC), getreg(RJC), getreg(RNBC), getreg(TSCTFC),
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getreg(MGTPRC), getreg(MGTPDC), getreg(MGTPTC),
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getreg(MGTPRC), getreg(MGTPDC), getreg(MGTPTC), getreg(GORCL),
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getreg(GOTCL),
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[TOTH] = mac_read_clr8, [TORH] = mac_read_clr8,
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[GOTCH] = mac_read_clr8, [GORCH] = mac_read_clr8,
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[PRC64] = mac_read_clr4, [PRC127] = mac_read_clr4,
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[PRC255] = mac_read_clr4, [PRC511] = mac_read_clr4,
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[PRC1023] = mac_read_clr4, [PRC1522] = mac_read_clr4,
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[PTC64] = mac_read_clr4, [PTC127] = mac_read_clr4,
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[PTC255] = mac_read_clr4, [PTC511] = mac_read_clr4,
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[PTC1023] = mac_read_clr4, [PTC1522] = mac_read_clr4,
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[GPRC] = mac_read_clr4, [GPTC] = mac_read_clr4,
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[TPT] = mac_read_clr4, [TPR] = mac_read_clr4,
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[RUC] = mac_read_clr4, [ROC] = mac_read_clr4,
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[BPRC] = mac_read_clr4, [MPRC] = mac_read_clr4,
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[TSCTC] = mac_read_clr4, [BPTC] = mac_read_clr4,
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[MPTC] = mac_read_clr4,
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[ICR] = mac_icr_read, [EECD] = get_eecd,
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[EERD] = flash_eerd_read,
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[RDFH] = mac_low13_read, [RDFT] = mac_low13_read,
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@ -1370,6 +1438,18 @@ static const uint8_t mac_reg_access[0x8000] = {
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[XONTXC] = markflag(MAC), [XOFFRXC] = markflag(MAC),
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[RJC] = markflag(MAC), [RNBC] = markflag(MAC),
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[MGTPDC] = markflag(MAC), [MGTPTC] = markflag(MAC),
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[RUC] = markflag(MAC), [ROC] = markflag(MAC),
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[GORCL] = markflag(MAC), [GORCH] = markflag(MAC),
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[GOTCL] = markflag(MAC), [GOTCH] = markflag(MAC),
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[BPRC] = markflag(MAC), [MPRC] = markflag(MAC),
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[TSCTC] = markflag(MAC), [PRC64] = markflag(MAC),
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[PRC127] = markflag(MAC), [PRC255] = markflag(MAC),
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[PRC511] = markflag(MAC), [PRC1023] = markflag(MAC),
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[PRC1522] = markflag(MAC), [PTC64] = markflag(MAC),
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[PTC127] = markflag(MAC), [PTC255] = markflag(MAC),
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[PTC511] = markflag(MAC), [PTC1023] = markflag(MAC),
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[PTC1522] = markflag(MAC), [MPTC] = markflag(MAC),
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[BPTC] = markflag(MAC),
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[TDFH] = markflag(MAC) | MAC_ACCESS_PARTIAL,
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[TDFT] = markflag(MAC) | MAC_ACCESS_PARTIAL,
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