mirror of https://gitee.com/openkylin/qemu.git
target-ppc: add vsrv instruction
Adds Vector Shift Right Variable instruction. Signed-off-by: Vivek Andrew Sha <vivekandrewsha@gmail.com> [ reverse the order of computation to avoid temporary array ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -211,6 +211,7 @@ DEF_HELPER_3(vslw, void, avr, avr, avr)
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DEF_HELPER_3(vsld, void, avr, avr, avr)
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DEF_HELPER_3(vsld, void, avr, avr, avr)
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DEF_HELPER_3(vslo, void, avr, avr, avr)
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DEF_HELPER_3(vslo, void, avr, avr, avr)
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DEF_HELPER_3(vsro, void, avr, avr, avr)
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DEF_HELPER_3(vsro, void, avr, avr, avr)
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DEF_HELPER_3(vsrv, void, avr, avr, avr)
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DEF_HELPER_3(vslv, void, avr, avr, avr)
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DEF_HELPER_3(vslv, void, avr, avr, avr)
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DEF_HELPER_3(vaddcuw, void, avr, avr, avr)
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DEF_HELPER_3(vaddcuw, void, avr, avr, avr)
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DEF_HELPER_3(vsubcuw, void, avr, avr, avr)
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DEF_HELPER_3(vsubcuw, void, avr, avr, avr)
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@ -1710,6 +1710,23 @@ void helper_vslv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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}
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}
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}
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}
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void helper_vsrv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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{
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int i;
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unsigned int shift, bytes;
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/* Use reverse order, as destination and source register can be same. Its
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* being modified in place saving temporary, reverse order will guarantee
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* that computed result is not fed back.
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*/
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for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) {
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shift = b->u8[i] & 0x7; /* extract shift value */
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bytes = ((i ? a->u8[i - 1] : 0) << 8) + a->u8[i];
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/* extract adjacent bytes */
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r->u8[i] = (bytes >> shift) & 0xFF; /* shift and store result */
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}
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}
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void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift)
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void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift)
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{
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{
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int sh = shift & 0xf;
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int sh = shift & 0xf;
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@ -383,6 +383,7 @@ GEN_VXFORM(vsrab, 2, 12);
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GEN_VXFORM(vsrah, 2, 13);
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GEN_VXFORM(vsrah, 2, 13);
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GEN_VXFORM(vsraw, 2, 14);
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GEN_VXFORM(vsraw, 2, 14);
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GEN_VXFORM(vsrad, 2, 15);
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GEN_VXFORM(vsrad, 2, 15);
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GEN_VXFORM(vsrv, 2, 28);
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GEN_VXFORM(vslv, 2, 29);
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GEN_VXFORM(vslv, 2, 29);
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GEN_VXFORM(vslo, 6, 16);
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GEN_VXFORM(vslo, 6, 16);
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GEN_VXFORM(vsro, 6, 17);
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GEN_VXFORM(vsro, 6, 17);
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@ -110,6 +110,7 @@ GEN_VXFORM(vsrab, 2, 12),
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GEN_VXFORM(vsrah, 2, 13),
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GEN_VXFORM(vsrah, 2, 13),
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GEN_VXFORM(vsraw, 2, 14),
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GEN_VXFORM(vsraw, 2, 14),
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GEN_VXFORM_207(vsrad, 2, 15),
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GEN_VXFORM_207(vsrad, 2, 15),
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GEN_VXFORM_300(vsrv, 2, 28),
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GEN_VXFORM_300(vslv, 2, 29),
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GEN_VXFORM_300(vslv, 2, 29),
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GEN_VXFORM(vslo, 6, 16),
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GEN_VXFORM(vslo, 6, 16),
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GEN_VXFORM(vsro, 6, 17),
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GEN_VXFORM(vsro, 6, 17),
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