mirror of https://gitee.com/openkylin/qemu.git
ppc4xx_i2c: Clean up and improve error logging
Make it more readable by converting register indexes to decimal (avoids lot of superfluous 0x0) and distinguish errors caused by accessing non-existent vs. unimplemented registers. No functional change. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
BALATON Zoltan
David Gibson
parent
c8fd8373e4
commit
42a907e839
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@ -31,7 +31,7 @@
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#include "hw/hw.h"
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#include "hw/i2c/ppc4xx_i2c.h"
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#define PPC4xx_I2C_MEM_SIZE 0x12
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#define PPC4xx_I2C_MEM_SIZE 18
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#define IIC_CNTL_PT (1 << 0)
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#define IIC_CNTL_READ (1 << 1)
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@ -70,7 +70,7 @@ static void ppc4xx_i2c_reset(DeviceState *s)
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i2c->intrmsk = 0;
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i2c->xfrcnt = 0;
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i2c->xtcntlss = 0;
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i2c->directcntl = 0x0f;
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i2c->directcntl = 0xf;
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i2c->intr = 0;
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}
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@ -85,7 +85,7 @@ static uint64_t ppc4xx_i2c_readb(void *opaque, hwaddr addr, unsigned int size)
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uint64_t ret;
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switch (addr) {
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case 0x00:
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case 0:
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ret = i2c->mdata;
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if (ppc4xx_i2c_is_master(i2c)) {
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ret = 0xff;
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@ -139,58 +139,62 @@ static uint64_t ppc4xx_i2c_readb(void *opaque, hwaddr addr, unsigned int size)
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TYPE_PPC4xx_I2C, __func__);
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}
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break;
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case 0x02:
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case 2:
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ret = i2c->sdata;
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break;
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case 0x04:
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case 4:
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ret = i2c->lmadr;
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break;
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case 0x05:
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case 5:
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ret = i2c->hmadr;
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break;
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case 0x06:
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case 6:
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ret = i2c->cntl;
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break;
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case 0x07:
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case 7:
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ret = i2c->mdcntl;
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break;
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case 0x08:
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case 8:
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ret = i2c->sts;
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break;
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case 0x09:
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case 9:
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ret = i2c->extsts;
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break;
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case 0x0A:
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case 10:
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ret = i2c->lsadr;
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break;
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case 0x0B:
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case 11:
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ret = i2c->hsadr;
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break;
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case 0x0C:
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case 12:
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ret = i2c->clkdiv;
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break;
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case 0x0D:
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case 13:
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ret = i2c->intrmsk;
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break;
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case 0x0E:
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case 14:
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ret = i2c->xfrcnt;
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break;
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case 0x0F:
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case 15:
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ret = i2c->xtcntlss;
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break;
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case 0x10:
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case 16:
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ret = i2c->directcntl;
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break;
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case 0x11:
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case 17:
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ret = i2c->intr;
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad address at offset 0x%"
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HWADDR_PRIx "\n", TYPE_PPC4xx_I2C, __func__, addr);
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if (addr < PPC4xx_I2C_MEM_SIZE) {
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qemu_log_mask(LOG_UNIMP, "%s: Unimplemented register 0x%"
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HWADDR_PRIx "\n", __func__, addr);
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} else {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%"
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HWADDR_PRIx "\n", __func__, addr);
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}
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ret = 0;
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break;
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}
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return ret;
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}
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@ -200,7 +204,7 @@ static void ppc4xx_i2c_writeb(void *opaque, hwaddr addr, uint64_t value,
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PPC4xxI2CState *i2c = opaque;
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switch (addr) {
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case 0x00:
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case 0:
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i2c->mdata = value;
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if (!i2c_bus_busy(i2c->bus)) {
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/* assume we start a write transfer */
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@ -225,19 +229,19 @@ static void ppc4xx_i2c_writeb(void *opaque, hwaddr addr, uint64_t value,
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}
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}
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break;
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case 0x02:
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case 2:
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i2c->sdata = value;
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break;
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case 0x04:
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case 4:
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i2c->lmadr = value;
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if (i2c_bus_busy(i2c->bus)) {
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i2c_end_transfer(i2c->bus);
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}
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break;
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case 0x05:
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case 5:
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i2c->hmadr = value;
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break;
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case 0x06:
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case 6:
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i2c->cntl = value;
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if (i2c->cntl & IIC_CNTL_PT) {
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if (i2c->cntl & IIC_CNTL_READ) {
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@ -263,32 +267,31 @@ static void ppc4xx_i2c_writeb(void *opaque, hwaddr addr, uint64_t value,
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}
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}
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break;
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case 0x07:
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i2c->mdcntl = value & 0xDF;
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case 7:
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i2c->mdcntl = value & 0xdf;
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break;
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case 0x08:
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i2c->sts &= ~(value & 0x0A);
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case 8:
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i2c->sts &= ~(value & 0xa);
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break;
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case 0x09:
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i2c->extsts &= ~(value & 0x8F);
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case 9:
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i2c->extsts &= ~(value & 0x8f);
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break;
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case 0x0A:
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case 10:
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i2c->lsadr = value;
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/*i2c_set_slave_address(i2c->bus, i2c->lsadr);*/
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break;
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case 0x0B:
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case 11:
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i2c->hsadr = value;
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break;
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case 0x0C:
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case 12:
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i2c->clkdiv = value;
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break;
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case 0x0D:
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case 13:
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i2c->intrmsk = value;
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break;
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case 0x0E:
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case 14:
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i2c->xfrcnt = value & 0x77;
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break;
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case 0x0F:
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case 15:
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if (value & IIC_XTCNTLSS_SRST) {
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/* Is it actually a full reset? U-Boot sets some regs before */
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ppc4xx_i2c_reset(DEVICE(i2c));
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@ -296,15 +299,20 @@ static void ppc4xx_i2c_writeb(void *opaque, hwaddr addr, uint64_t value,
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}
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i2c->xtcntlss = value;
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break;
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case 0x10:
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case 16:
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i2c->directcntl = value & 0x7;
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break;
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case 0x11:
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case 17:
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i2c->intr = value;
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad address at offset 0x%"
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HWADDR_PRIx "\n", TYPE_PPC4xx_I2C, __func__, addr);
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if (addr < PPC4xx_I2C_MEM_SIZE) {
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qemu_log_mask(LOG_UNIMP, "%s: Unimplemented register 0x%"
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HWADDR_PRIx "\n", __func__, addr);
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} else {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%"
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HWADDR_PRIx "\n", __func__, addr);
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}
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break;
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}
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}
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