target/avr: Register AVR support with the rest of QEMU

Add AVR related definitions into QEMU, make AVR support buildable.

[AM: Remove word 'Atmel' from filenames and all elements of code]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-23-huth@tuxfamily.org>
[PMD: Fixed @avr tag in qapi/machine.json]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Michael Rolnik 2020-01-24 01:51:21 +01:00 committed by Philippe Mathieu-Daudé
parent 9d8caa67a2
commit 42f3ff0013
8 changed files with 75 additions and 1 deletions

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@ -975,6 +975,15 @@ F: include/hw/*/nrf51*.h
F: include/hw/*/microbit*.h F: include/hw/*/microbit*.h
F: tests/qtest/microbit-test.c F: tests/qtest/microbit-test.c
AVR Machines
-------------
AVR MCUs
M: Michael Rolnik <mrolnik@gmail.com>
R: Sarah Harris <S.E.Harris@kent.ac.uk>
S: Maintained
F: default-configs/avr-softmmu.mak
CRIS Machines CRIS Machines
------------- -------------
Axis Dev88 Axis Dev88

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@ -90,6 +90,8 @@ int graphic_depth = 32;
#define QEMU_ARCH QEMU_ARCH_UNICORE32 #define QEMU_ARCH QEMU_ARCH_UNICORE32
#elif defined(TARGET_XTENSA) #elif defined(TARGET_XTENSA)
#define QEMU_ARCH QEMU_ARCH_XTENSA #define QEMU_ARCH QEMU_ARCH_XTENSA
#elif defined(TARGET_AVR)
#define QEMU_ARCH QEMU_ARCH_AVR
#endif #endif
const uint32_t arch_type = QEMU_ARCH; const uint32_t arch_type = QEMU_ARCH;

7
configure vendored
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@ -8143,6 +8143,10 @@ case "$target_name" in
mttcg="yes" mttcg="yes"
gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml arm-m-profile.xml" gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml arm-m-profile.xml"
;; ;;
avr)
gdb_xml_files="avr-cpu.xml"
target_compiler=$cross_cc_avr
;;
cris) cris)
;; ;;
hppa) hppa)
@ -8387,6 +8391,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
disas_config "ARM_A64" disas_config "ARM_A64"
fi fi
;; ;;
avr)
disas_config "AVR"
;;
cris) cris)
disas_config "CRIS" disas_config "CRIS"
;; ;;

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@ -0,0 +1 @@
# Default configuration for avr-softmmu

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@ -211,6 +211,25 @@ enum bfd_architecture
#define bfd_mach_m32r 0 /* backwards compatibility */ #define bfd_mach_m32r 0 /* backwards compatibility */
bfd_arch_mn10200, /* Matsushita MN10200 */ bfd_arch_mn10200, /* Matsushita MN10200 */
bfd_arch_mn10300, /* Matsushita MN10300 */ bfd_arch_mn10300, /* Matsushita MN10300 */
bfd_arch_avr, /* AVR microcontrollers */
#define bfd_mach_avr1 1
#define bfd_mach_avr2 2
#define bfd_mach_avr25 25
#define bfd_mach_avr3 3
#define bfd_mach_avr31 31
#define bfd_mach_avr35 35
#define bfd_mach_avr4 4
#define bfd_mach_avr5 5
#define bfd_mach_avr51 51
#define bfd_mach_avr6 6
#define bfd_mach_avrtiny 100
#define bfd_mach_avrxmega1 101
#define bfd_mach_avrxmega2 102
#define bfd_mach_avrxmega3 103
#define bfd_mach_avrxmega4 104
#define bfd_mach_avrxmega5 105
#define bfd_mach_avrxmega6 106
#define bfd_mach_avrxmega7 107
bfd_arch_cris, /* Axis CRIS */ bfd_arch_cris, /* Axis CRIS */
#define bfd_mach_cris_v0_v10 255 #define bfd_mach_cris_v0_v10 255
#define bfd_mach_cris_v32 32 #define bfd_mach_cris_v32 32

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@ -25,6 +25,7 @@ enum {
QEMU_ARCH_HPPA = (1 << 18), QEMU_ARCH_HPPA = (1 << 18),
QEMU_ARCH_RISCV = (1 << 19), QEMU_ARCH_RISCV = (1 << 19),
QEMU_ARCH_RX = (1 << 20), QEMU_ARCH_RX = (1 << 20),
QEMU_ARCH_AVR = (1 << 21),
QEMU_ARCH_NONE = (1 << 31), QEMU_ARCH_NONE = (1 << 31),
}; };

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@ -17,6 +17,7 @@
# being. # being.
# #
# @rx: since 5.0 # @rx: since 5.0
# @avr: since 5.1
# #
# Notes: The resulting QMP strings can be appended to the "qemu-system-" # Notes: The resulting QMP strings can be appended to the "qemu-system-"
# prefix to produce the corresponding QEMU executable name. This # prefix to produce the corresponding QEMU executable name. This
@ -25,7 +26,7 @@
# Since: 3.0 # Since: 3.0
## ##
{ 'enum' : 'SysEmuTarget', { 'enum' : 'SysEmuTarget',
'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32', 'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 'lm32',
'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64', 'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64',
'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc', 'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc',
'ppc64', 'riscv32', 'riscv64', 'rx', 's390x', 'sh4', 'ppc64', 'riscv32', 'riscv64', 'rx', 's390x', 'sh4',

34
target/avr/Makefile.objs Normal file
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@ -0,0 +1,34 @@
#
# QEMU AVR
#
# Copyright (c) 2016-2020 Michael Rolnik
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
# Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, see
# <http://www.gnu.org/licenses/lgpl-2.1.html>
#
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
decode-y = $(SRC_PATH)/target/avr/insn.decode
target/avr/decode_insn.inc.c: $(decode-y) $(DECODETREE)
$(call quiet-command, \
$(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth 16 $<, \
"GEN", $(TARGET_DIR)$@)
target/avr/translate.o: target/avr/decode_insn.inc.c
obj-y += translate.o cpu.o helper.o
obj-y += gdbstub.o
obj-y += disas.o
obj-$(CONFIG_SOFTMMU) += machine.o