mirror of https://gitee.com/openkylin/qemu.git
More phys_ram_base removal.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7060 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
dc828ca1b5
commit
4465449097
|
@ -193,8 +193,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
|
|||
regular ROM image and perform the normal CPU reset sequence.
|
||||
Otherwise jump directly to the entry point. */
|
||||
if (lowaddr == 0) {
|
||||
env->regs[13] = tswap32(*(uint32_t *)phys_ram_base);
|
||||
pc = tswap32(*(uint32_t *)(phys_ram_base + 4));
|
||||
env->regs[13] = ldl_phys(0);
|
||||
pc = ldl_phys(4);
|
||||
} else {
|
||||
pc = entry;
|
||||
}
|
||||
|
|
|
@ -74,6 +74,5 @@ qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s);
|
|||
qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s);
|
||||
|
||||
/* sm501.c */
|
||||
void sm501_init(uint32_t base, unsigned long local_mem_base,
|
||||
uint32_t local_mem_bytes, CharDriverState *chr);
|
||||
void sm501_init(uint32_t base, uint32_t local_mem_bytes, CharDriverState *chr);
|
||||
#endif
|
||||
|
|
2
hw/pc.c
2
hw/pc.c
|
@ -871,7 +871,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
|
|||
goto bios_error;
|
||||
}
|
||||
bios_offset = qemu_ram_alloc(bios_size);
|
||||
ret = load_image(buf, phys_ram_base + bios_offset);
|
||||
ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
|
||||
if (ret != bios_size) {
|
||||
bios_error:
|
||||
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
||||
|
|
|
@ -110,6 +110,7 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
|
||||
void *fw_cfg;
|
||||
void *dbdma;
|
||||
uint8_t *vga_bios_ptr;
|
||||
|
||||
linux_boot = (kernel_filename != NULL);
|
||||
|
||||
|
@ -154,8 +155,9 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
|
||||
/* allocate and load VGA BIOS */
|
||||
vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
|
||||
vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
|
||||
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
|
||||
vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
|
||||
vga_bios_size = load_image(buf, vga_bios_ptr + 8);
|
||||
if (vga_bios_size < 0) {
|
||||
/* if no bios is present, we can still work */
|
||||
fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
|
||||
|
@ -163,12 +165,11 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
} else {
|
||||
/* set a specific header (XXX: find real Apple format for NDRV
|
||||
drivers) */
|
||||
phys_ram_base[vga_bios_offset] = 'N';
|
||||
phys_ram_base[vga_bios_offset + 1] = 'D';
|
||||
phys_ram_base[vga_bios_offset + 2] = 'R';
|
||||
phys_ram_base[vga_bios_offset + 3] = 'V';
|
||||
cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
|
||||
vga_bios_size);
|
||||
vga_bios_ptr[0] = 'N';
|
||||
vga_bios_ptr[1] = 'D';
|
||||
vga_bios_ptr[2] = 'R';
|
||||
vga_bios_ptr[3] = 'V';
|
||||
cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
|
||||
vga_bios_size += 8;
|
||||
}
|
||||
|
||||
|
@ -199,8 +200,8 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
/* load initrd */
|
||||
if (initrd_filename) {
|
||||
initrd_base = INITRD_LOAD_ADDR;
|
||||
initrd_size = load_image(initrd_filename,
|
||||
phys_ram_base + initrd_base);
|
||||
initrd_size = load_image_targphys(initrd_filename, initrd_base,
|
||||
ram_size - initrd_base);
|
||||
if (initrd_size < 0) {
|
||||
cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
|
||||
initrd_filename);
|
||||
|
|
|
@ -138,6 +138,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
int index;
|
||||
void *fw_cfg;
|
||||
void *dbdma;
|
||||
uint8_t *vga_bios_ptr;
|
||||
|
||||
linux_boot = (kernel_filename != NULL);
|
||||
|
||||
|
@ -187,8 +188,9 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
|
||||
/* allocate and load VGA BIOS */
|
||||
vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
|
||||
vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
|
||||
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
|
||||
vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
|
||||
vga_bios_size = load_image(buf, vga_bios_ptr + 8);
|
||||
if (vga_bios_size < 0) {
|
||||
/* if no bios is present, we can still work */
|
||||
fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
|
||||
|
@ -196,12 +198,11 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
|
|||
} else {
|
||||
/* set a specific header (XXX: find real Apple format for NDRV
|
||||
drivers) */
|
||||
phys_ram_base[vga_bios_offset] = 'N';
|
||||
phys_ram_base[vga_bios_offset + 1] = 'D';
|
||||
phys_ram_base[vga_bios_offset + 2] = 'R';
|
||||
phys_ram_base[vga_bios_offset + 3] = 'V';
|
||||
cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
|
||||
vga_bios_size);
|
||||
vga_bios_ptr[0] = 'N';
|
||||
vga_bios_ptr[1] = 'D';
|
||||
vga_bios_ptr[2] = 'R';
|
||||
vga_bios_ptr[3] = 'V';
|
||||
cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
|
||||
vga_bios_size += 8;
|
||||
}
|
||||
|
||||
|
|
6
hw/r2d.c
6
hw/r2d.c
|
@ -200,7 +200,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
|
|||
{
|
||||
CPUState *env;
|
||||
struct SH7750State *s;
|
||||
ram_addr_t sdram_addr, sm501_vga_ram_addr;
|
||||
ram_addr_t sdram_addr;
|
||||
qemu_irq *irq;
|
||||
PCIBus *pci;
|
||||
int i;
|
||||
|
@ -222,9 +222,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
|
|||
irq = r2d_fpga_init(0x04000000, sh7750_irl(s));
|
||||
pci = sh_pci_register_bus(r2d_pci_set_irq, r2d_pci_map_irq, irq, 0, 4);
|
||||
|
||||
sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE);
|
||||
sm501_init(0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
|
||||
serial_hds[2]);
|
||||
sm501_init(0x10000000, SM501_VRAM_SIZE, serial_hds[2]);
|
||||
|
||||
/* onboard CF (True IDE mode, Master only). */
|
||||
if ((i = drive_get_index(IF_IDE, 0, 0)) != -1)
|
||||
|
|
18
hw/sm501.c
18
hw/sm501.c
|
@ -455,6 +455,7 @@ typedef struct SM501State {
|
|||
target_phys_addr_t base;
|
||||
uint32_t local_mem_size_index;
|
||||
uint8_t * local_mem;
|
||||
ram_addr_t local_mem_offset;
|
||||
uint32_t last_width;
|
||||
uint32_t last_height;
|
||||
|
||||
|
@ -972,6 +973,7 @@ static void sm501_draw_crt(SM501State * s)
|
|||
int y_start = -1;
|
||||
int page_min = 0x7fffffff;
|
||||
int page_max = -1;
|
||||
ram_addr_t offset = s->local_mem_offset;
|
||||
|
||||
/* choose draw_line function */
|
||||
switch (s->dc_crt_control & 3) {
|
||||
|
@ -1005,10 +1007,9 @@ static void sm501_draw_crt(SM501State * s)
|
|||
/* draw each line according to conditions */
|
||||
for (y = 0; y < height; y++) {
|
||||
int update = full_update;
|
||||
uint8_t * line_end = &src[width * src_bpp - 1];
|
||||
int page0 = (src - phys_ram_base) & TARGET_PAGE_MASK;
|
||||
int page1 = (line_end - phys_ram_base) & TARGET_PAGE_MASK;
|
||||
int page;
|
||||
ram_addr_t page0 = offset & TARGET_PAGE_MASK;
|
||||
ram_addr_t page1 = (offset + width * src_bpp - 1) & TARGET_PAGE_MASK;
|
||||
ram_addr_t page;
|
||||
|
||||
/* check dirty flags for each line */
|
||||
for (page = page0; page <= page1; page += TARGET_PAGE_SIZE)
|
||||
|
@ -1033,6 +1034,7 @@ static void sm501_draw_crt(SM501State * s)
|
|||
}
|
||||
|
||||
src += width * src_bpp;
|
||||
offset += width * src_bpp;
|
||||
}
|
||||
|
||||
/* complete flush to display */
|
||||
|
@ -1053,8 +1055,7 @@ static void sm501_update_display(void *opaque)
|
|||
sm501_draw_crt(s);
|
||||
}
|
||||
|
||||
void sm501_init(uint32_t base, unsigned long local_mem_base,
|
||||
uint32_t local_mem_bytes, CharDriverState *chr)
|
||||
void sm501_init(uint32_t base, uint32_t local_mem_bytes, CharDriverState *chr)
|
||||
{
|
||||
SM501State * s;
|
||||
int sm501_system_config_index;
|
||||
|
@ -1073,8 +1074,9 @@ void sm501_init(uint32_t base, unsigned long local_mem_base,
|
|||
s->dc_crt_control = 0x00010000;
|
||||
|
||||
/* allocate local memory */
|
||||
s->local_mem = (uint8 *)phys_ram_base + local_mem_base;
|
||||
cpu_register_physical_memory(base, local_mem_bytes, local_mem_base);
|
||||
s->local_mem_offset = qemu_ram_alloc(local_mem_bytes);
|
||||
s->local_mem = qemu_get_ram_ptr(s->local_mem_offset);
|
||||
cpu_register_physical_memory(base, local_mem_bytes, s->local_mem_offset);
|
||||
|
||||
/* map mmio */
|
||||
sm501_system_config_index
|
||||
|
|
|
@ -123,6 +123,7 @@ struct tc6393xb_s {
|
|||
|
||||
DisplayState *ds;
|
||||
ram_addr_t vram_addr;
|
||||
uint16_t *vram_ptr;
|
||||
uint32_t scr_width, scr_height; /* in pixels */
|
||||
qemu_irq l3v;
|
||||
unsigned blank : 1,
|
||||
|
@ -593,6 +594,7 @@ struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq)
|
|||
cpu_register_physical_memory(base, 0x10000, iomemtype);
|
||||
|
||||
s->vram_addr = qemu_ram_alloc(0x100000);
|
||||
s->vram_ptr = qemu_get_ram_ptr(s->vram_addr);
|
||||
cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
|
||||
s->scr_width = 480;
|
||||
s->scr_height = 640;
|
||||
|
|
|
@ -43,7 +43,7 @@ static void glue(tc6393xb_draw_graphic, BITS)(struct tc6393xb_s *s)
|
|||
uint16_t *data_buffer;
|
||||
uint8_t *data_display;
|
||||
|
||||
data_buffer = (uint16_t*)(phys_ram_base + s->vram_addr);
|
||||
data_buffer = s->vram_ptr;
|
||||
w_display = s->scr_width * BITS / 8;
|
||||
data_display = ds_get_data(s->ds);
|
||||
for(i = 0; i < s->scr_height; i++) {
|
||||
|
|
Loading…
Reference in New Issue