mirror of https://gitee.com/openkylin/qemu.git
s390x/tcg: Implement VECTOR COUNT TRAILING ZEROS
Implement it similar to VECTOR COUNT LEADING ZEROS. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
This commit is contained in:
parent
28863f1dbd
commit
449a8ac250
|
@ -152,6 +152,8 @@ DEF_HELPER_FLAGS_4(gvec_vavgl8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
|
|||
DEF_HELPER_FLAGS_4(gvec_vavgl16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
|
||||
DEF_HELPER_FLAGS_3(gvec_vclz8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
|
||||
DEF_HELPER_FLAGS_3(gvec_vclz16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
|
||||
DEF_HELPER_FLAGS_3(gvec_vctz8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
|
||||
DEF_HELPER_FLAGS_3(gvec_vctz16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
|
||||
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
DEF_HELPER_3(servc, i32, env, i64, i64)
|
||||
|
|
|
@ -1086,6 +1086,8 @@
|
|||
E(0xe7f9, VCHL, VRR_b, V, 0, 0, 0, 0, vc, 0, TCG_COND_GTU, IF_VEC)
|
||||
/* VECTOR COUNT LEADING ZEROS */
|
||||
F(0xe753, VCLZ, VRR_a, V, 0, 0, 0, 0, vclz, 0, IF_VEC)
|
||||
/* VECTOR COUNT TRAILING ZEROS */
|
||||
F(0xe752, VCTZ, VRR_a, V, 0, 0, 0, 0, vctz, 0, IF_VEC)
|
||||
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
/* COMPARE AND SWAP AND PURGE */
|
||||
|
|
|
@ -1448,3 +1448,31 @@ static DisasJumpType op_vclz(DisasContext *s, DisasOps *o)
|
|||
gen_gvec_2(get_field(s->fields, v1), get_field(s->fields, v2), &g[es]);
|
||||
return DISAS_NEXT;
|
||||
}
|
||||
|
||||
static void gen_ctz_i32(TCGv_i32 d, TCGv_i32 a)
|
||||
{
|
||||
tcg_gen_ctzi_i32(d, a, 32);
|
||||
}
|
||||
|
||||
static void gen_ctz_i64(TCGv_i64 d, TCGv_i64 a)
|
||||
{
|
||||
tcg_gen_ctzi_i64(d, a, 64);
|
||||
}
|
||||
|
||||
static DisasJumpType op_vctz(DisasContext *s, DisasOps *o)
|
||||
{
|
||||
const uint8_t es = get_field(s->fields, m3);
|
||||
static const GVecGen2 g[4] = {
|
||||
{ .fno = gen_helper_gvec_vctz8, },
|
||||
{ .fno = gen_helper_gvec_vctz16, },
|
||||
{ .fni4 = gen_ctz_i32, },
|
||||
{ .fni8 = gen_ctz_i64, },
|
||||
};
|
||||
|
||||
if (es > ES_64) {
|
||||
gen_program_exception(s, PGM_SPECIFICATION);
|
||||
return DISAS_NORETURN;
|
||||
}
|
||||
gen_gvec_2(get_field(s->fields, v1), get_field(s->fields, v2), &g[es]);
|
||||
return DISAS_NEXT;
|
||||
}
|
||||
|
|
|
@ -60,3 +60,17 @@ void HELPER(gvec_vclz##BITS)(void *v1, const void *v2, uint32_t desc) \
|
|||
}
|
||||
DEF_VCLZ(8)
|
||||
DEF_VCLZ(16)
|
||||
|
||||
#define DEF_VCTZ(BITS) \
|
||||
void HELPER(gvec_vctz##BITS)(void *v1, const void *v2, uint32_t desc) \
|
||||
{ \
|
||||
int i; \
|
||||
\
|
||||
for (i = 0; i < (128 / BITS); i++) { \
|
||||
const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
|
||||
\
|
||||
s390_vec_write_element##BITS(v1, i, a ? ctz32(a) : BITS); \
|
||||
} \
|
||||
}
|
||||
DEF_VCTZ(8)
|
||||
DEF_VCTZ(16)
|
||||
|
|
Loading…
Reference in New Issue