From 475dc65f6d33d8f457d5731c38618b0b3d4e127c Mon Sep 17 00:00:00 2001 From: aurel32 Date: Thu, 18 Dec 2008 22:43:40 +0000 Subject: [PATCH] PCI: Mask writes to RO bits in the command reg of PCI config space The Command register in the PCI config space has some read-only bits. Any writes to those bits should be masked out. Signed-off-by: Amit Shah Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6092 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/pci.c | 3 +++ hw/pci.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/hw/pci.c b/hw/pci.c index b95c79440c..8252d21b95 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -417,6 +417,9 @@ void pci_default_write_config(PCIDevice *d, if (can_write) { /* Mask out writes to reserved bits in registers */ switch (addr) { + case 0x05: + val &= ~PCI_COMMAND_RESERVED_MASK_HI; + break; case 0x06: val &= ~PCI_STATUS_RESERVED_MASK_LO; break; diff --git a/hw/pci.h b/hw/pci.h index 95905db1ec..3b1caf5ca8 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -69,6 +69,11 @@ typedef struct PCIIORegion { #define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8) +/* Bits in the PCI Command Register (PCI 2.3 spec) */ +#define PCI_COMMAND_RESERVED 0xf800 + +#define PCI_COMMAND_RESERVED_MASK_HI (PCI_COMMAND_RESERVED >> 8) + struct PCIDevice { /* PCI config space */ uint8_t config[256];