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Silence gcc warning about constant overflow 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2008-09-06 17:50:16 +00:00
parent 5f9981c71d
commit 47ad35f16a
2 changed files with 11 additions and 3 deletions
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10
target-sparc/cpu.h
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@ -142,7 +142,15 @@
#define FSR_FTT2 (1ULL << 16)
#define FSR_FTT1 (1ULL << 15)
#define FSR_FTT0 (1ULL << 14)
#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0)
//gcc warns about constant overflow for ~FSR_FTT_MASK
//#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0)
#ifdef TARGET_SPARC64
#define FSR_FTT_NMASK 0xfffffffffffe3fffULL
#define FSR_FTT_CEXC_NMASK 0xfffffffffffe3fe0ULL
#else
#define FSR_FTT_NMASK 0xfffe3fffULL
#define FSR_FTT_CEXC_NMASK 0xfffe3fe0ULL
#endif
#define FSR_FTT_IEEE_EXCP (1ULL << 14)
#define FSR_FTT_UNIMPFPOP (3ULL << 14)
#define FSR_FTT_SEQ_ERROR (4ULL << 14)

4
target-sparc/translate.c
View File

@ -1602,7 +1602,7 @@ static inline void gen_op_fpexception_im(int fsr_flags)
{
TCGv r_const;
tcg_gen_andi_tl(cpu_fsr, cpu_fsr, ~FSR_FTT_MASK);
tcg_gen_andi_tl(cpu_fsr, cpu_fsr, FSR_FTT_NMASK);
tcg_gen_ori_tl(cpu_fsr, cpu_fsr, fsr_flags);
r_const = tcg_const_i32(TT_FP_EXCP);
tcg_gen_helper_0_1(raise_exception, r_const);
@ -1628,7 +1628,7 @@ static int gen_trap_ifnofpu(DisasContext *dc, TCGv r_cond)
static inline void gen_op_clear_ieee_excp_and_FTT(void)
{
tcg_gen_andi_tl(cpu_fsr, cpu_fsr, ~(FSR_FTT_MASK | FSR_CEXC_MASK));
tcg_gen_andi_tl(cpu_fsr, cpu_fsr, FSR_FTT_CEXC_NMASK);
}
static inline void gen_clear_float_exceptions(void)