target-ppc: fix tcg fatal error on i386 host

It looks like the i386 runs out of registers for allocation due
to too many global registers allocated by the ppc target.

Here is a quick and dirty fix that seems to solve the problem.
This should be considered as temporary.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5648 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-11-08 08:57:45 +00:00
parent 18c5f8eab1
commit 4870167d04
2 changed files with 14 additions and 1 deletions

View File

@ -530,7 +530,11 @@ struct CPUPPCState {
* during translated code execution * during translated code execution
*/ */
#if TARGET_LONG_BITS > HOST_LONG_BITS #if TARGET_LONG_BITS > HOST_LONG_BITS
target_ulong t0, t1, t2; target_ulong t0, t1;
#endif
/* XXX: this is a temporary workaround for i386. cf translate.c comment */
#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386)
target_ulong t2;
#endif #endif
#if !defined(TARGET_PPC64) #if !defined(TARGET_PPC64)
/* temporary fixed-point registers /* temporary fixed-point registers

View File

@ -97,8 +97,17 @@ void ppc_translate_init(void)
#else #else
cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0"); cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0");
cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1"); cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
#ifdef HOST_I386
/* XXX: This is a temporary workaround for i386.
* On i386 qemu_st32 runs out of registers.
* The proper fix is to remove cpu_T.
*/
cpu_T[2] = tcg_global_mem_new(TCG_TYPE_TL,
TCG_AREG0, offsetof(CPUState, t2), "T2");
#else
cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2"); cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
#endif #endif
#endif
#if !defined(TARGET_PPC64) #if !defined(TARGET_PPC64)
cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64, cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64,
TCG_AREG0, offsetof(CPUState, t0_64), TCG_AREG0, offsetof(CPUState, t0_64),