mirror of https://gitee.com/openkylin/qemu.git
armv7m: Replace armv7m.hack with unassigned_access handler
For v7m we need to catch attempts to execute from special addresses at 0xfffffff0 and above. Previously we did this with the aid of a hacky special purpose lump of memory in the address space and a check in translate.c for whether we were translating code at those addresses. We can implement this more cleanly using a CPU unassigned access handler which throws the exception if the unassigned access is for one of the special addresses. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1484937883-1068-3-git-send-email-peter.maydell@linaro.org [PMM: * drop the deletion of the "don't interrupt if PC is magic" code in arm_v7m_cpu_exec_interrupt() -- this is still required * don't generate an exception for unassigned accesses which aren't to the magic address -- although doing this is in theory correct in practice it will break currently working guests which rely on the RAZ/WI behaviour when they touch devices which we haven't modelled. * trigger EXCP_EXCEPTION_EXIT on is_exec, not !is_write ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -180,7 +180,6 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
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uint64_t entry;
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uint64_t lowaddr;
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int big_endian;
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MemoryRegion *hack = g_new(MemoryRegion, 1);
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if (cpu_model == NULL) {
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cpu_model = "cortex-m3";
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@ -225,13 +224,6 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
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}
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}
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/* Hack to map an additional page of ram at the top of the address
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space. This stops qemu complaining about executing code outside RAM
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when returning from an exception. */
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memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000, &error_fatal);
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vmstate_register_ram_global(hack);
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memory_region_add_subregion(system_memory, 0xfffff000, hack);
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qemu_register_reset(armv7m_reset, cpu);
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return nvic;
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}
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@ -292,6 +292,33 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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}
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#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
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static void arm_v7m_unassigned_access(CPUState *cpu, hwaddr addr,
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bool is_write, bool is_exec, int opaque,
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unsigned size)
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{
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ARMCPU *arm = ARM_CPU(cpu);
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CPUARMState *env = &arm->env;
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/* ARMv7-M interrupt return works by loading a magic value into the PC.
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* On real hardware the load causes the return to occur. The qemu
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* implementation performs the jump normally, then does the exception
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* return by throwing a special exception when when the CPU tries to
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* execute code at the magic address.
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*/
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if (env->v7m.exception != 0 && addr >= 0xfffffff0 && is_exec) {
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cpu->exception_index = EXCP_EXCEPTION_EXIT;
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cpu_loop_exit(cpu);
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}
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/* In real hardware an attempt to access parts of the address space
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* with nothing there will usually cause an external abort.
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* However our QEMU board models are often missing device models where
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* the guest can boot anyway with the default read-as-zero/writes-ignored
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* behaviour that you get without a QEMU unassigned_access hook.
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* So just return here to retain that default behaviour.
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*/
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}
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static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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CPUClass *cc = CPU_GET_CLASS(cs);
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@ -1016,6 +1043,7 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
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cc->do_interrupt = arm_v7m_cpu_do_interrupt;
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#endif
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cc->do_unassigned_access = arm_v7m_unassigned_access;
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cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt;
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}
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@ -11719,12 +11719,12 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
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break;
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}
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#else
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if (dc->pc >= 0xfffffff0 && arm_dc_feature(dc, ARM_FEATURE_M)) {
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/* We always get here via a jump, so know we are not in a
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conditional execution block. */
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gen_exception_internal(EXCP_EXCEPTION_EXIT);
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dc->is_jmp = DISAS_EXC;
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break;
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if (arm_dc_feature(dc, ARM_FEATURE_M)) {
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/* Branches to the magic exception-return addresses should
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* already have been caught via the arm_v7m_unassigned_access hook,
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* and never get here.
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*/
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assert(dc->pc < 0xfffffff0);
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}
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#endif
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