mirror of https://gitee.com/openkylin/qemu.git
hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs
In the next commit we will implement the write_with_attrs() handler. To avoid using different APIs, convert the read() handler first. Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Tested-by: Francisco Iglesias <frasse.iglesias@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1202,27 +1202,26 @@ static void lqspi_load_cache(void *opaque, hwaddr addr)
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}
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}
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static uint64_t
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lqspi_read(void *opaque, hwaddr addr, unsigned int size)
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static MemTxResult lqspi_read(void *opaque, hwaddr addr, uint64_t *value,
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unsigned size, MemTxAttrs attrs)
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{
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XilinxQSPIPS *q = opaque;
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uint32_t ret;
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XilinxQSPIPS *q = XILINX_QSPIPS(opaque);
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if (addr >= q->lqspi_cached_addr &&
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addr <= q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) {
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uint8_t *retp = &q->lqspi_buf[addr - q->lqspi_cached_addr];
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ret = cpu_to_le32(*(uint32_t *)retp);
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DB_PRINT_L(1, "addr: %08x, data: %08x\n", (unsigned)addr,
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(unsigned)ret);
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return ret;
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} else {
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lqspi_load_cache(opaque, addr);
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return lqspi_read(opaque, addr, size);
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*value = cpu_to_le32(*(uint32_t *)retp);
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DB_PRINT_L(1, "addr: %08" HWADDR_PRIx ", data: %08" PRIx64 "\n",
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addr, *value);
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return MEMTX_OK;
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}
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lqspi_load_cache(opaque, addr);
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return lqspi_read(opaque, addr, value, size, attrs);
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}
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static const MemoryRegionOps lqspi_ops = {
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.read = lqspi_read,
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.read_with_attrs = lqspi_read,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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