mirror of https://gitee.com/openkylin/qemu.git
xics: split to xics and xics-common
The upcoming XICS-KVM support will use bits of emulated XICS code. So this introduces new level of hierarchy - "xics-common" class. Both emulated XICS and XICS-KVM will inherit from it and override class callbacks when required. The new "xics-common" class implements: 1. replaces static "nr_irqs" and "nr_servers" properties with the dynamic ones and adds callbacks to be executed when properties are set. 2. xics_cpu_setup() callback renamed to xics_common_cpu_setup() as it is a common part for both XICS'es 3. xics_reset() renamed to xics_common_reset() for the same reason. The emulated XICS changes: 1. the part of xics_realize() which creates ICPs is moved to the "nr_servers" property callback as realize() is too late to create/initialize devices and instance_init() is too early to create devices as the number of child devices comes via the "nr_servers" property. 2. added ics_initfn() which does a little part of what xics_realize() did. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
parent
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156
hw/intc/xics.c
156
hw/intc/xics.c
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@ -30,6 +30,7 @@
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/xics.h"
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#include "qemu/error-report.h"
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#include "qapi/visitor.h"
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void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
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{
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@ -55,9 +56,12 @@ void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
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}
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}
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static void xics_reset(DeviceState *d)
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/*
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* XICS Common class - parent for emulated XICS and KVM-XICS
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*/
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static void xics_common_reset(DeviceState *d)
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{
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XICSState *icp = XICS(d);
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XICSState *icp = XICS_COMMON(d);
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int i;
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for (i = 0; i < icp->nr_servers; i++) {
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@ -67,6 +71,99 @@ static void xics_reset(DeviceState *d)
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device_reset(DEVICE(icp->ics));
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}
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static void xics_prop_get_nr_irqs(Object *obj, Visitor *v,
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void *opaque, const char *name, Error **errp)
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{
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XICSState *icp = XICS_COMMON(obj);
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int64_t value = icp->nr_irqs;
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visit_type_int(v, &value, name, errp);
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}
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static void xics_prop_set_nr_irqs(Object *obj, Visitor *v,
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void *opaque, const char *name, Error **errp)
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{
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XICSState *icp = XICS_COMMON(obj);
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XICSStateClass *info = XICS_COMMON_GET_CLASS(icp);
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Error *error = NULL;
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int64_t value;
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visit_type_int(v, &value, name, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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if (icp->nr_irqs) {
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error_setg(errp, "Number of interrupts is already set to %u",
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icp->nr_irqs);
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return;
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}
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assert(info->set_nr_irqs);
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assert(icp->ics);
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info->set_nr_irqs(icp, value, errp);
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}
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static void xics_prop_get_nr_servers(Object *obj, Visitor *v,
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void *opaque, const char *name,
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Error **errp)
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{
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XICSState *icp = XICS_COMMON(obj);
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int64_t value = icp->nr_servers;
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visit_type_int(v, &value, name, errp);
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}
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static void xics_prop_set_nr_servers(Object *obj, Visitor *v,
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void *opaque, const char *name,
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Error **errp)
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{
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XICSState *icp = XICS_COMMON(obj);
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XICSStateClass *info = XICS_COMMON_GET_CLASS(icp);
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Error *error = NULL;
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int64_t value;
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visit_type_int(v, &value, name, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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if (icp->nr_servers) {
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error_setg(errp, "Number of servers is already set to %u",
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icp->nr_servers);
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return;
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}
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assert(info->set_nr_servers);
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info->set_nr_servers(icp, value, errp);
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}
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static void xics_common_initfn(Object *obj)
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{
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object_property_add(obj, "nr_irqs", "int",
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xics_prop_get_nr_irqs, xics_prop_set_nr_irqs,
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NULL, NULL, NULL);
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object_property_add(obj, "nr_servers", "int",
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xics_prop_get_nr_servers, xics_prop_set_nr_servers,
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NULL, NULL, NULL);
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}
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static void xics_common_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->reset = xics_common_reset;
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}
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static const TypeInfo xics_common_info = {
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.name = TYPE_XICS_COMMON,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(XICSState),
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.class_size = sizeof(XICSStateClass),
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.instance_init = xics_common_initfn,
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.class_init = xics_common_class_init,
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};
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/*
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* ICP: Presentation layer
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*/
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@ -479,6 +576,13 @@ static const VMStateDescription vmstate_ics = {
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},
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};
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static void ics_initfn(Object *obj)
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{
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ICSState *ics = ICS(obj);
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ics->offset = XICS_IRQ_BASE;
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}
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static void ics_realize(DeviceState *dev, Error **errp)
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{
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ICSState *ics = ICS(dev);
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@ -509,6 +613,7 @@ static const TypeInfo ics_info = {
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.instance_size = sizeof(ICSState),
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.class_init = ics_class_init,
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.class_size = sizeof(ICSStateClass),
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.instance_init = ics_initfn,
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};
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/*
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@ -689,10 +794,31 @@ static void rtas_int_on(PowerPCCPU *cpu, sPAPREnvironment *spapr,
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* XICS
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*/
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static void xics_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
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{
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icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
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}
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static void xics_set_nr_servers(XICSState *icp, uint32_t nr_servers,
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Error **errp)
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{
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int i;
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icp->nr_servers = nr_servers;
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icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
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for (i = 0; i < icp->nr_servers; i++) {
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char buffer[32];
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object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_ICP);
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snprintf(buffer, sizeof(buffer), "icp[%d]", i);
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object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
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errp);
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}
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}
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static void xics_realize(DeviceState *dev, Error **errp)
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{
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XICSState *icp = XICS(dev);
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ICSState *ics = icp->ics;
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Error *error = NULL;
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int i;
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@ -712,21 +838,13 @@ static void xics_realize(DeviceState *dev, Error **errp)
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spapr_register_hypercall(H_XIRR, h_xirr);
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spapr_register_hypercall(H_EOI, h_eoi);
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ics->nr_irqs = icp->nr_irqs;
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ics->offset = XICS_IRQ_BASE;
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ics->icp = icp;
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object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
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for (i = 0; i < icp->nr_servers; i++) {
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char buffer[32];
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object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_ICP);
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snprintf(buffer, sizeof(buffer), "icp[%d]", i);
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object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]), NULL);
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object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
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if (error) {
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error_propagate(errp, error);
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@ -741,33 +859,31 @@ static void xics_initfn(Object *obj)
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xics->ics = ICS(object_new(TYPE_ICS));
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object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
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xics->ics->icp = xics;
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}
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static Property xics_properties[] = {
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DEFINE_PROP_UINT32("nr_servers", XICSState, nr_servers, -1),
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DEFINE_PROP_UINT32("nr_irqs", XICSState, nr_irqs, -1),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void xics_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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XICSStateClass *xsc = XICS_CLASS(oc);
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dc->realize = xics_realize;
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dc->props = xics_properties;
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dc->reset = xics_reset;
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xsc->set_nr_irqs = xics_set_nr_irqs;
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xsc->set_nr_servers = xics_set_nr_servers;
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}
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static const TypeInfo xics_info = {
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.name = TYPE_XICS,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_XICS_COMMON,
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.instance_size = sizeof(XICSState),
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.class_size = sizeof(XICSStateClass),
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.class_init = xics_class_init,
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.instance_init = xics_initfn,
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};
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static void xics_register_types(void)
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{
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type_register_static(&xics_common_info);
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type_register_static(&xics_info);
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type_register_static(&ics_info);
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type_register_static(&icp_info);
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return NULL;
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}
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return XICS(dev);
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return XICS_COMMON(dev);
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}
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static XICSState *xics_system_init(int nr_servers, int nr_irqs)
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#include "hw/sysbus.h"
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#define TYPE_XICS_COMMON "xics-common"
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#define XICS_COMMON(obj) OBJECT_CHECK(XICSState, (obj), TYPE_XICS_COMMON)
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#define TYPE_XICS "xics"
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#define XICS(obj) OBJECT_CHECK(XICSState, (obj), TYPE_XICS)
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#define XICS_COMMON_CLASS(klass) \
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OBJECT_CLASS_CHECK(XICSStateClass, (klass), TYPE_XICS_COMMON)
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#define XICS_CLASS(klass) \
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OBJECT_CLASS_CHECK(XICSStateClass, (klass), TYPE_XICS)
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#define XICS_COMMON_GET_CLASS(obj) \
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OBJECT_GET_CLASS(XICSStateClass, (obj), TYPE_XICS_COMMON)
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#define XICS_GET_CLASS(obj) \
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OBJECT_GET_CLASS(XICSStateClass, (obj), TYPE_XICS)
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#define XICS_IPI 0x2
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#define XICS_BUID 0x1
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#define XICS_IRQ_BASE (XICS_BUID << 12)
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* (the kernel implementation supports more but we don't exploit
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* that yet)
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*/
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typedef struct XICSStateClass XICSStateClass;
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typedef struct XICSState XICSState;
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typedef struct ICPStateClass ICPStateClass;
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typedef struct ICPState ICPState;
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typedef struct ICSState ICSState;
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typedef struct ICSIRQState ICSIRQState;
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struct XICSStateClass {
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DeviceClass parent_class;
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void (*set_nr_irqs)(XICSState *icp, uint32_t nr_irqs, Error **errp);
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void (*set_nr_servers)(XICSState *icp, uint32_t nr_servers, Error **errp);
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};
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struct XICSState {
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/*< private >*/
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SysBusDevice parent_obj;
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