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mips64-linux-user: Enable 64-bit address mode and fpu 

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2013-02-10 10:30:46 -08:00 committed by Aurelien Jarno
parent ff4f738281
commit 68473f15d4
1 changed files with 12 additions and 0 deletions
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12
target-mips/translate.c
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@ -15944,6 +15944,14 @@ void cpu_state_reset(CPUMIPSState *env)
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
env->CP0_Status = (MIPS_HFLAG_UM << CP0St_KSU); env->CP0_Status = (MIPS_HFLAG_UM << CP0St_KSU);
# ifdef TARGET_MIPS64
/* Enable 64-bit register mode. */
env->CP0_Status |= (1 << CP0St_PX);
# endif
# ifdef TARGET_ABI_MIPSN64
/* Enable 64-bit address mode. */
env->CP0_Status |= (1 << CP0St_UX);
# endif
/* Enable access to the CPUNum, SYNCI_Step, CC, and CCRes RDHWR /* Enable access to the CPUNum, SYNCI_Step, CC, and CCRes RDHWR
hardware registers. */ hardware registers. */
env->CP0_HWREna |= 0x0000000F; env->CP0_HWREna |= 0x0000000F;
@ -15953,6 +15961,10 @@ void cpu_state_reset(CPUMIPSState *env)
if (env->CP0_Config3 & (1 << CP0C3_DSPP)) { if (env->CP0_Config3 & (1 << CP0C3_DSPP)) {
env->CP0_Status |= (1 << CP0St_MX); env->CP0_Status |= (1 << CP0St_MX);
} }
/* Enable 64-bit FPU if the target cpu supports it. */
if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
env->CP0_Status |= (1 << CP0St_FR);
}
#else #else
if (env->hflags & MIPS_HFLAG_BMASK) { if (env->hflags & MIPS_HFLAG_BMASK) {
/* If the exception was raised from a delay slot, /* If the exception was raised from a delay slot,